1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-PRESERVE-CFG 3; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-MODIFY-CFG 4target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32-p3:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64-A2" 5 6declare void @llvm.memcpy.p2.p2.i32(ptr addrspace(2) nocapture, ptr addrspace(2) nocapture readonly, i32, i1) 7declare void @llvm.memcpy.p1.p2.i32(ptr addrspace(1) nocapture, ptr addrspace(2) nocapture readonly, i32, i1) 8declare void @llvm.memcpy.p2.p1.i32(ptr addrspace(2) nocapture, ptr addrspace(1) nocapture readonly, i32, i1) 9declare void @llvm.memcpy.p1.p1.i32(ptr addrspace(1) nocapture, ptr addrspace(1) nocapture readonly, i32, i1) 10 11 12define void @test_address_space_1_1(ptr addrspace(1) %a, ptr addrspace(1) %b) { 13; CHECK-LABEL: @test_address_space_1_1( 14; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr addrspace(1) [[A:%.*]], align 2 15; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr addrspace(1) [[B:%.*]], align 2 16; CHECK-NEXT: ret void 17; 18 %aa = alloca <2 x i64>, align 16, addrspace(2) 19 call void @llvm.memcpy.p2.p1.i32(ptr addrspace(2) align 2 %aa, ptr addrspace(1) align 2 %a, i32 16, i1 false) 20 call void @llvm.memcpy.p1.p2.i32(ptr addrspace(1) align 2 %b, ptr addrspace(2) align 2 %aa, i32 16, i1 false) 21 ret void 22} 23 24define void @test_address_space_1_0(ptr addrspace(1) %a, ptr addrspace(2) %b) { 25; CHECK-LABEL: @test_address_space_1_0( 26; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr addrspace(1) [[A:%.*]], align 2 27; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr addrspace(2) [[B:%.*]], align 2 28; CHECK-NEXT: ret void 29; 30 %aa = alloca <2 x i64>, align 16, addrspace(2) 31 call void @llvm.memcpy.p2.p1.i32(ptr addrspace(2) align 2 %aa, ptr addrspace(1) align 2 %a, i32 16, i1 false) 32 call void @llvm.memcpy.p2.p2.i32(ptr addrspace(2) align 2 %b, ptr addrspace(2) align 2 %aa, i32 16, i1 false) 33 ret void 34} 35 36define void @test_address_space_0_1(ptr addrspace(2) %a, ptr addrspace(1) %b) { 37; CHECK-LABEL: @test_address_space_0_1( 38; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr addrspace(2) [[A:%.*]], align 2 39; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr addrspace(1) [[B:%.*]], align 2 40; CHECK-NEXT: ret void 41; 42 %aa = alloca <2 x i64>, align 16, addrspace(2) 43 call void @llvm.memcpy.p2.p2.i32(ptr addrspace(2) align 2 %aa, ptr addrspace(2) align 2 %a, i32 16, i1 false) 44 call void @llvm.memcpy.p1.p2.i32(ptr addrspace(1) align 2 %b, ptr addrspace(2) align 2 %aa, i32 16, i1 false) 45 ret void 46} 47 48%struct.struct_test_27.0.13 = type { i32, float, i64, i8, [4 x i32] } 49 50define void @copy_struct([5 x i64] %in.coerce, ptr addrspace(1) align 4 %ptr) { 51; CHECK-LABEL: @copy_struct( 52; CHECK-NEXT: for.end: 53; CHECK-NEXT: [[IN_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE:%.*]], 0 54; CHECK-NEXT: [[IN_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 1 55; CHECK-NEXT: [[IN_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 2 56; CHECK-NEXT: [[IN_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 3 57; CHECK-NEXT: [[IN_SROA_2_4_EXTRACT_SHIFT:%.*]] = lshr i64 [[IN_COERCE_FCA_2_EXTRACT]], 32 58; CHECK-NEXT: [[IN_SROA_2_4_EXTRACT_TRUNC:%.*]] = trunc i64 [[IN_SROA_2_4_EXTRACT_SHIFT]] to i32 59; CHECK-NEXT: store i32 [[IN_SROA_2_4_EXTRACT_TRUNC]], ptr addrspace(1) [[PTR:%.*]], align 4 60; CHECK-NEXT: [[IN_SROA_4_20_PTR_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[PTR]], i16 4 61; CHECK-NEXT: store i64 [[IN_COERCE_FCA_3_EXTRACT]], ptr addrspace(1) [[IN_SROA_4_20_PTR_SROA_IDX]], align 4 62; CHECK-NEXT: [[IN_SROA_5_20_PTR_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[PTR]], i16 12 63; CHECK-NEXT: store i32 undef, ptr addrspace(1) [[IN_SROA_5_20_PTR_SROA_IDX]], align 4 64; CHECK-NEXT: ret void 65; 66for.end: 67 %in = alloca %struct.struct_test_27.0.13, align 8, addrspace(2) 68 store [5 x i64] %in.coerce, ptr addrspace(2) %in, align 8 69 %scevgep9 = getelementptr %struct.struct_test_27.0.13, ptr addrspace(2) %in, i32 0, i32 4, i32 0 70 call void @llvm.memcpy.p1.p2.i32(ptr addrspace(1) align 4 %ptr, ptr addrspace(2) align 4 %scevgep9, i32 16, i1 false) 71 ret void 72} 73 74%union.anon = type { ptr } 75 76@g = common global i32 0, align 4 77@l = common addrspace(3) global i32 0, align 4 78 79; If pointers from different address spaces have different sizes, make sure an 80; illegal bitcast isn't introduced 81define void @pr27557() { 82; CHECK-LABEL: @pr27557( 83; CHECK-NEXT: [[DOTSROA_0:%.*]] = alloca ptr, align 8, addrspace(2) 84; CHECK-NEXT: store ptr @g, ptr addrspace(2) [[DOTSROA_0]], align 8 85; CHECK-NEXT: store ptr addrspace(3) @l, ptr addrspace(2) [[DOTSROA_0]], align 8 86; CHECK-NEXT: ret void 87; 88 %1 = alloca %union.anon, align 8, addrspace(2) 89 store ptr @g, ptr addrspace(2) %1, align 8 90 store ptr addrspace(3) @l, ptr addrspace(2) %1, align 8 91 ret void 92} 93 94@l4 = common addrspace(4) global i32 0, align 4 95 96; If pointers from different address spaces have the same size, that pointer 97; should be promoted through the pair of `ptrtoint`/`inttoptr`. 98define ptr @pr27557.alt() { 99; CHECK-LABEL: @pr27557.alt( 100; CHECK-NEXT: ret ptr inttoptr (i64 ptrtoint (ptr addrspace(4) @l4 to i64) to ptr) 101; 102 %1 = alloca %union.anon, align 8, addrspace(2) 103 store ptr addrspace(4) @l4, ptr addrspace(2) %1, align 8 104 %2 = load ptr, ptr addrspace(2) %1, align 8 105 ret ptr %2 106} 107 108; Test load from and store to non-zero address space. 109define void @test_load_store_diff_addr_space(ptr addrspace(1) %complex1, ptr addrspace(1) %complex2) { 110; CHECK-LABEL: @test_load_store_diff_addr_space( 111; CHECK-NEXT: [[V13:%.*]] = load i32, ptr addrspace(1) [[COMPLEX1:%.*]], align 4 112; CHECK-NEXT: [[COMPLEX1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[COMPLEX1]], i16 4 113; CHECK-NEXT: [[V14:%.*]] = load i32, ptr addrspace(1) [[COMPLEX1_SROA_IDX]], align 4 114; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[V13]] to float 115; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[V14]] to float 116; CHECK-NEXT: [[SUM:%.*]] = fadd float [[TMP1]], [[TMP2]] 117; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[SUM]] to i32 118; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[SUM]] to i32 119; CHECK-NEXT: store i32 [[TMP3]], ptr addrspace(1) [[COMPLEX2:%.*]], align 4 120; CHECK-NEXT: [[COMPLEX2_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[COMPLEX2]], i16 4 121; CHECK-NEXT: store i32 [[TMP4]], ptr addrspace(1) [[COMPLEX2_SROA_IDX]], align 4 122; CHECK-NEXT: ret void 123; 124 %a0 = alloca [2 x i64], align 8, addrspace(2) 125 %a.gep2 = getelementptr [2 x float], ptr addrspace(2) %a0, i32 0, i32 1 126 %v1 = load i64, ptr addrspace(1) %complex1 127 store i64 %v1, ptr addrspace(2) %a0 128 %f1 = load float, ptr addrspace(2) %a0 129 %f2 = load float, ptr addrspace(2) %a.gep2 130 %sum = fadd float %f1, %f2 131 store float %sum, ptr addrspace(2) %a0 132 store float %sum, ptr addrspace(2) %a.gep2 133 %v2 = load i64, ptr addrspace(2) %a0 134 store i64 %v2, ptr addrspace(1) %complex2 135 ret void 136} 137 138define void @addressspace_alloca_lifetime() { 139; CHECK-LABEL: @addressspace_alloca_lifetime( 140; CHECK-NEXT: ret void 141; 142 %alloca = alloca i8, align 8, addrspace(2) 143 %cast = addrspacecast ptr addrspace(2) %alloca to ptr 144 call void @llvm.lifetime.start.p0(i64 2, ptr %cast) 145 ret void 146} 147 148declare void @llvm.lifetime.start.p0(i64 %size, ptr nocapture %ptr) 149;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 150; CHECK-MODIFY-CFG: {{.*}} 151; CHECK-PRESERVE-CFG: {{.*}} 152