1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-PRESERVE-CFG 3; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-MODIFY-CFG 4target datalayout = "e-p:64:64:64-p1:16:16:16-p3:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64" 5 6declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture readonly, i32, i1) 7declare void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) nocapture, ptr nocapture readonly, i32, i1) 8declare void @llvm.memcpy.p0.p1.i32(ptr nocapture, ptr addrspace(1) nocapture readonly, i32, i1) 9declare void @llvm.memcpy.p1.p1.i32(ptr addrspace(1) nocapture, ptr addrspace(1) nocapture readonly, i32, i1) 10 11 12; Make sure an illegal bitcast isn't introduced 13define void @test_address_space_1_1(ptr addrspace(1) %a, ptr addrspace(1) %b) { 14; CHECK-LABEL: @test_address_space_1_1( 15; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr addrspace(1) [[A:%.*]], align 2 16; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr addrspace(1) [[B:%.*]], align 2 17; CHECK-NEXT: ret void 18; 19 %aa = alloca <2 x i64>, align 16 20 call void @llvm.memcpy.p0.p1.i32(ptr align 2 %aa, ptr addrspace(1) align 2 %a, i32 16, i1 false) 21 call void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) align 2 %b, ptr align 2 %aa, i32 16, i1 false) 22 ret void 23} 24 25define void @test_address_space_1_0(ptr addrspace(1) %a, ptr %b) { 26; CHECK-LABEL: @test_address_space_1_0( 27; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr addrspace(1) [[A:%.*]], align 2 28; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr [[B:%.*]], align 2 29; CHECK-NEXT: ret void 30; 31 %aa = alloca <2 x i64>, align 16 32 call void @llvm.memcpy.p0.p1.i32(ptr align 2 %aa, ptr addrspace(1) align 2 %a, i32 16, i1 false) 33 call void @llvm.memcpy.p0.p0.i32(ptr align 2 %b, ptr align 2 %aa, i32 16, i1 false) 34 ret void 35} 36 37define void @test_address_space_0_1(ptr %a, ptr addrspace(1) %b) { 38; CHECK-LABEL: @test_address_space_0_1( 39; CHECK-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr [[A:%.*]], align 2 40; CHECK-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr addrspace(1) [[B:%.*]], align 2 41; CHECK-NEXT: ret void 42; 43 %aa = alloca <2 x i64>, align 16 44 call void @llvm.memcpy.p0.p0.i32(ptr align 2 %aa, ptr align 2 %a, i32 16, i1 false) 45 call void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) align 2 %b, ptr align 2 %aa, i32 16, i1 false) 46 ret void 47} 48 49%struct.struct_test_27.0.13 = type { i32, float, i64, i8, [4 x i32] } 50 51define void @copy_struct([5 x i64] %in.coerce, ptr addrspace(1) align 4 %ptr) { 52; CHECK-LABEL: @copy_struct( 53; CHECK-NEXT: for.end: 54; CHECK-NEXT: [[IN_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE:%.*]], 0 55; CHECK-NEXT: [[IN_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 1 56; CHECK-NEXT: [[IN_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 2 57; CHECK-NEXT: [[IN_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [5 x i64] [[IN_COERCE]], 3 58; CHECK-NEXT: [[IN_SROA_2_4_EXTRACT_SHIFT:%.*]] = lshr i64 [[IN_COERCE_FCA_2_EXTRACT]], 32 59; CHECK-NEXT: [[IN_SROA_2_4_EXTRACT_TRUNC:%.*]] = trunc i64 [[IN_SROA_2_4_EXTRACT_SHIFT]] to i32 60; CHECK-NEXT: store i32 [[IN_SROA_2_4_EXTRACT_TRUNC]], ptr addrspace(1) [[PTR:%.*]], align 4 61; CHECK-NEXT: [[IN_SROA_4_20_PTR_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[PTR]], i16 4 62; CHECK-NEXT: store i64 [[IN_COERCE_FCA_3_EXTRACT]], ptr addrspace(1) [[IN_SROA_4_20_PTR_SROA_IDX]], align 4 63; CHECK-NEXT: [[IN_SROA_5_20_PTR_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[PTR]], i16 12 64; CHECK-NEXT: store i32 undef, ptr addrspace(1) [[IN_SROA_5_20_PTR_SROA_IDX]], align 4 65; CHECK-NEXT: ret void 66; 67for.end: 68 %in = alloca %struct.struct_test_27.0.13, align 8 69 store [5 x i64] %in.coerce, ptr %in, align 8 70 %scevgep9 = getelementptr %struct.struct_test_27.0.13, ptr %in, i32 0, i32 4, i32 0 71 call void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) align 4 %ptr, ptr align 4 %scevgep9, i32 16, i1 false) 72 ret void 73} 74 75%union.anon = type { ptr } 76 77@g = common global i32 0, align 4 78@l = common addrspace(3) global i32 0, align 4 79 80; If pointers from different address spaces have different sizes, make sure an 81; illegal bitcast isn't introduced 82define void @pr27557() { 83; CHECK-LABEL: @pr27557( 84; CHECK-NEXT: [[DOTSROA_0:%.*]] = alloca ptr, align 8 85; CHECK-NEXT: store ptr @g, ptr [[DOTSROA_0]], align 8 86; CHECK-NEXT: store ptr addrspace(3) @l, ptr [[DOTSROA_0]], align 8 87; CHECK-NEXT: ret void 88; 89 %1 = alloca %union.anon, align 8 90 store ptr @g, ptr %1, align 8 91 store ptr addrspace(3) @l, ptr %1, align 8 92 ret void 93} 94 95@l2 = common addrspace(2) global i32 0, align 4 96 97; If pointers from different address spaces have the same size, that pointer 98; should be promoted through the pair of `ptrtoint`/`inttoptr`. 99define ptr @pr27557.alt() { 100; CHECK-LABEL: @pr27557.alt( 101; CHECK-NEXT: ret ptr inttoptr (i64 ptrtoint (ptr addrspace(2) @l2 to i64) to ptr) 102; 103 %1 = alloca %union.anon, align 8 104 store ptr addrspace(2) @l2, ptr %1, align 8 105 %2 = load ptr, ptr %1, align 8 106 ret ptr %2 107} 108 109; Make sure pre-splitting doesn't try to introduce an illegal bitcast 110define float @presplit(ptr addrspace(1) %p) { 111; CHECK-LABEL: @presplit( 112; CHECK-NEXT: entry: 113; CHECK-NEXT: [[L1:%.*]] = load i32, ptr addrspace(1) [[P:%.*]], align 4 114; CHECK-NEXT: [[P_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[P]], i16 4 115; CHECK-NEXT: [[L2:%.*]] = load i32, ptr addrspace(1) [[P_SROA_IDX]], align 4 116; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[L1]] to float 117; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[L2]] to float 118; CHECK-NEXT: [[RET:%.*]] = fadd float [[TMP0]], [[TMP1]] 119; CHECK-NEXT: ret float [[RET]] 120; 121entry: 122 %b = alloca i64 123 %b.gep2 = getelementptr [2 x float], ptr %b, i32 0, i32 1 124 %l = load i64, ptr addrspace(1) %p 125 store i64 %l, ptr %b 126 %f1 = load float, ptr %b 127 %f2 = load float, ptr %b.gep2 128 %ret = fadd float %f1, %f2 129 ret float %ret 130} 131 132; Test load from and store to non-zero address space. 133define void @test_load_store_diff_addr_space(ptr addrspace(1) %complex1, ptr addrspace(1) %complex2) { 134; CHECK-LABEL: @test_load_store_diff_addr_space( 135; CHECK-NEXT: [[V13:%.*]] = load i32, ptr addrspace(1) [[COMPLEX1:%.*]], align 4 136; CHECK-NEXT: [[COMPLEX1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[COMPLEX1]], i16 4 137; CHECK-NEXT: [[V14:%.*]] = load i32, ptr addrspace(1) [[COMPLEX1_SROA_IDX]], align 4 138; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[V13]] to float 139; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[V14]] to float 140; CHECK-NEXT: [[SUM:%.*]] = fadd float [[TMP1]], [[TMP2]] 141; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[SUM]] to i32 142; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[SUM]] to i32 143; CHECK-NEXT: store i32 [[TMP3]], ptr addrspace(1) [[COMPLEX2:%.*]], align 4 144; CHECK-NEXT: [[COMPLEX2_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[COMPLEX2]], i16 4 145; CHECK-NEXT: store i32 [[TMP4]], ptr addrspace(1) [[COMPLEX2_SROA_IDX]], align 4 146; CHECK-NEXT: ret void 147; 148 %a = alloca i64 149 %a.gep2 = getelementptr [2 x float], ptr %a, i32 0, i32 1 150 %v1 = load i64, ptr addrspace(1) %complex1 151 store i64 %v1, ptr %a 152 %f1 = load float, ptr %a 153 %f2 = load float, ptr %a.gep2 154 %sum = fadd float %f1, %f2 155 store float %sum, ptr %a 156 store float %sum, ptr %a.gep2 157 %v2 = load i64, ptr %a 158 store i64 %v2, ptr addrspace(1) %complex2 159 ret void 160} 161;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 162; CHECK-MODIFY-CFG: {{.*}} 163; CHECK-PRESERVE-CFG: {{.*}} 164