xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/vectorize-reordered-list.ll (revision 15ee17c3ce34623261788d7de3c1bdf5860be34e)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: %if x86-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown %s | FileCheck %s %}
3; RUN: %if aarch64-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=aarch64-unknown %s | FileCheck %s %}
4
5define void @test(ptr %isec) {
6; CHECK-LABEL: @test(
7; CHECK-NEXT:  entry:
8; CHECK-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[ISEC:%.*]], i64 2
9; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x double>, ptr [[ISEC]], align 8
10; CHECK-NEXT:    [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX2]], align 8
11; CHECK-NEXT:    [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]]
12; CHECK-NEXT:    [[TMP5:%.*]] = fsub <2 x double> [[TMP1]], [[TMP3]]
13; CHECK-NEXT:    [[TMP6:%.*]] = shufflevector <2 x double> [[TMP4]], <2 x double> [[TMP5]], <2 x i32> <i32 1, i32 2>
14; CHECK-NEXT:    store <2 x double> [[TMP6]], ptr [[ISEC]], align 8
15; CHECK-NEXT:    ret void
16;
17entry:
18  %arrayidx5 = getelementptr inbounds double, ptr %isec, i64 1
19  %0 = load double, ptr %arrayidx5, align 8
20  %1 = load double, ptr %isec, align 8
21  %arrayidx3 = getelementptr inbounds double, ptr %isec, i64 3
22  %2 = load double, ptr %arrayidx3, align 8
23  %arrayidx2 = getelementptr inbounds double, ptr %isec, i64 2
24  %3 = load double, ptr %arrayidx2, align 8
25  %4 = fadd double %0, %2
26  %5 = fsub double %1, %3
27  store double %4, ptr %isec
28  store double %5, ptr %arrayidx5
29  ret void
30}
31