xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/vectorizable-functions-inseltpoison.ll (revision 580210a0c938531ef9fd79f9ffedb93eeb2e66c2) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=slp-vectorizer -S %s | FileCheck %s
3
4declare float @memread(float) readonly nounwind willreturn #0
5declare <4 x float> @vmemread(<4 x float>)
6
7define <4 x float> @memread_4x(ptr %a) {
8; CHECK-LABEL: @memread_4x(
9; CHECK-NEXT:  entry:
10; CHECK-NEXT:    [[TMP0:%.*]] = load <4 x float>, ptr [[A:%.*]], align 16
11; CHECK-NEXT:    [[TMP1:%.*]] = call fast <4 x float> @vmemread(<4 x float> [[TMP0]])
12; CHECK-NEXT:    ret <4 x float> [[TMP1]]
13;
14entry:
15  %0 = load <4 x float>, ptr %a, align 16
16  %vecext = extractelement <4 x float> %0, i32 0
17  %1 = tail call fast float @memread(float %vecext) #0
18  %vecins = insertelement <4 x float> poison, float %1, i32 0
19  %vecext.1 = extractelement <4 x float> %0, i32 1
20  %2 = tail call fast float @memread(float %vecext.1) #0
21  %vecins.1 = insertelement <4 x float> %vecins, float %2, i32 1
22  %vecext.2 = extractelement <4 x float> %0, i32 2
23  %3 = tail call fast float @memread(float %vecext.2) #0
24  %vecins.2 = insertelement <4 x float> %vecins.1, float %3, i32 2
25  %vecext.3 = extractelement <4 x float> %0, i32 3
26  %4 = tail call fast float @memread(float %vecext.3) #0
27  %vecins.3 = insertelement <4 x float> %vecins.2, float %4, i32 3
28  ret <4 x float> %vecins.3
29}
30
31declare float @memwrite(float) nounwind willreturn #1
32declare <4 x float> @vmemwrite(<4 x float>)
33
34define <4 x float> @memwrite_4x(ptr %a) {
35; CHECK-LABEL: @memwrite_4x(
36; CHECK-NEXT:  entry:
37; CHECK-NEXT:    [[TMP0:%.*]] = load <4 x float>, ptr [[A:%.*]], align 16
38; CHECK-NEXT:    [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
39; CHECK-NEXT:    [[TMP1:%.*]] = tail call fast float @memwrite(float [[VECEXT]]) #[[ATTR2:[0-9]+]]
40; CHECK-NEXT:    [[VECINS:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i32 0
41; CHECK-NEXT:    [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
42; CHECK-NEXT:    [[TMP2:%.*]] = tail call fast float @memwrite(float [[VECEXT_1]]) #[[ATTR2]]
43; CHECK-NEXT:    [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
44; CHECK-NEXT:    [[VECEXT_2:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
45; CHECK-NEXT:    [[TMP3:%.*]] = tail call fast float @memwrite(float [[VECEXT_2]]) #[[ATTR2]]
46; CHECK-NEXT:    [[VECINS_2:%.*]] = insertelement <4 x float> [[VECINS_1]], float [[TMP3]], i32 2
47; CHECK-NEXT:    [[VECEXT_3:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
48; CHECK-NEXT:    [[TMP4:%.*]] = tail call fast float @memwrite(float [[VECEXT_3]]) #[[ATTR2]]
49; CHECK-NEXT:    [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
50; CHECK-NEXT:    ret <4 x float> [[VECINS_3]]
51;
52entry:
53  %0 = load <4 x float>, ptr %a, align 16
54  %vecext = extractelement <4 x float> %0, i32 0
55  %1 = tail call fast float @memwrite(float %vecext) #1
56  %vecins = insertelement <4 x float> poison, float %1, i32 0
57  %vecext.1 = extractelement <4 x float> %0, i32 1
58  %2 = tail call fast float @memwrite(float %vecext.1) #1
59  %vecins.1 = insertelement <4 x float> %vecins, float %2, i32 1
60  %vecext.2 = extractelement <4 x float> %0, i32 2
61  %3 = tail call fast float @memwrite(float %vecext.2) #1
62  %vecins.2 = insertelement <4 x float> %vecins.1, float %3, i32 2
63  %vecext.3 = extractelement <4 x float> %0, i32 3
64  %4 = tail call fast float @memwrite(float %vecext.3) #1
65  %vecins.3 = insertelement <4 x float> %vecins.2, float %4, i32 3
66  ret <4 x float> %vecins.3
67}
68
69attributes #0 = { "vector-function-abi-variant"="_ZGV_LLVM_N4v_memread(vmemread)" }
70attributes #1 = { "vector-function-abi-variant"="_ZGV_LLVM_N4v_memwrite(vmemwrite)" }
71