1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: %if x86-registered-target %{ opt -S --passes=slp-vectorizer -slp-threshold=-99999 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s %} 3; RUN: %if aarch64-registered-target %{ opt -S --passes=slp-vectorizer -slp-threshold=-99999 -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s %} 4 5define void @test(i32 %arg) { 6; CHECK-LABEL: define void @test( 7; CHECK-SAME: i32 [[ARG:%.*]]) { 8; CHECK-NEXT: bb: 9; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> <i32 poison, i32 0>, i32 [[ARG]], i32 0 10; CHECK-NEXT: br label [[BB2:%.*]] 11; CHECK: bb2: 12; CHECK-NEXT: switch i32 0, label [[BB10:%.*]] [ 13; CHECK-NEXT: i32 0, label [[BB9:%.*]] 14; CHECK-NEXT: i32 11, label [[BB9]] 15; CHECK-NEXT: i32 1, label [[BB4:%.*]] 16; CHECK-NEXT: ] 17; CHECK: bb3: 18; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[TMP0]], i32 0 19; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 20; CHECK-NEXT: switch i32 0, label [[BB10]] [ 21; CHECK-NEXT: i32 18, label [[BB7:%.*]] 22; CHECK-NEXT: i32 1, label [[BB7]] 23; CHECK-NEXT: i32 0, label [[BB10]] 24; CHECK-NEXT: ] 25; CHECK: bb4: 26; CHECK-NEXT: [[TMP3:%.*]] = phi <2 x i32> [ [[TMP0]], [[BB2]] ] 27; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i32> [[TMP3]], i32 0 28; CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 29; CHECK-NEXT: [[GETELEMENTPTR:%.*]] = getelementptr i32, ptr null, i64 [[TMP5]] 30; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i32> [[TMP3]], i32 1 31; CHECK-NEXT: [[TMP6:%.*]] = zext i32 [[TMP7]] to i64 32; CHECK-NEXT: [[GETELEMENTPTR6:%.*]] = getelementptr i32, ptr null, i64 [[TMP6]] 33; CHECK-NEXT: ret void 34; CHECK: bb7: 35; CHECK-NEXT: [[PHI8:%.*]] = phi i64 [ [[TMP2]], [[BB3:%.*]] ], [ [[TMP2]], [[BB3]] ] 36; CHECK-NEXT: br label [[BB9]] 37; CHECK: bb9: 38; CHECK-NEXT: ret void 39; CHECK: bb10: 40; CHECK-NEXT: ret void 41; 42bb: 43 %zext = zext i32 %arg to i64 44 %zext1 = zext i32 0 to i64 45 br label %bb2 46 47bb2: 48 switch i32 0, label %bb10 [ 49 i32 0, label %bb9 50 i32 11, label %bb9 51 i32 1, label %bb4 52 ] 53 54bb3: 55 switch i32 0, label %bb10 [ 56 i32 18, label %bb7 57 i32 1, label %bb7 58 i32 0, label %bb10 59 ] 60 61bb4: 62 %phi = phi i64 [ %zext, %bb2 ] 63 %phi5 = phi i64 [ %zext1, %bb2 ] 64 %getelementptr = getelementptr i32, ptr null, i64 %phi 65 %getelementptr6 = getelementptr i32, ptr null, i64 %phi5 66 ret void 67 68bb7: 69 %phi8 = phi i64 [ %zext, %bb3 ], [ %zext, %bb3 ] 70 br label %bb9 71 72bb9: 73 ret void 74 75bb10: 76 ret void 77} 78