1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: %if x86-registered-target %{ opt < %s -passes=slp-vectorizer -slp-threshold=-1000 -mtriple=x86_64 -S | FileCheck %s %} 3; RUN: %if aarch64-registered-target %{ opt < %s -passes=slp-vectorizer -slp-threshold=-1000 -mtriple=aarch64-unknown-linux-gnu -S | FileCheck %s %} 4 5; The inputs to vector phi should remain undef. 6 7define i32 @phi3UndefInput(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) { 8; CHECK-LABEL: @phi3UndefInput( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]] 11; CHECK: bb2: 12; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG0:%.*]], i32 0 13; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG1:%.*]], i32 1 14; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG2:%.*]], i32 2 15; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG3:%.*]], i32 3 16; CHECK-NEXT: br label [[BB3]] 17; CHECK: bb3: 18; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 undef, i8 undef, i8 undef>, [[ENTRY:%.*]] ] 19; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.vector.reduce.or.v4i8(<4 x i8> [[TMP4]]) 20; CHECK-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32 21; CHECK-NEXT: ret i32 [[TMP6]] 22; 23entry: 24 br i1 %cond, label %bb2, label %bb3 25 26bb2: 27 br label %bb3 28 29bb3: 30 %phi0 = phi i8 [ %arg0, %bb2 ], [ 0, %entry ] 31 %phi1 = phi i8 [ %arg1, %bb2 ], [ undef, %entry ] 32 %phi2 = phi i8 [ %arg2, %bb2 ], [ undef, %entry ] 33 %phi3 = phi i8 [ %arg3, %bb2 ], [ undef, %entry ] 34 %zext0 = zext i8 %phi0 to i32 35 %zext1 = zext i8 %phi1 to i32 36 %zext2 = zext i8 %phi2 to i32 37 %zext3 = zext i8 %phi3 to i32 38 %or1 = or i32 %zext0, %zext1 39 %or2 = or i32 %or1, %zext2 40 %or3 = or i32 %or2, %zext3 41 ret i32 %or3 42} 43 44define i32 @phi2UndefInput(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) { 45; CHECK-LABEL: @phi2UndefInput( 46; CHECK-NEXT: entry: 47; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]] 48; CHECK: bb2: 49; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG0:%.*]], i32 0 50; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG1:%.*]], i32 1 51; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG2:%.*]], i32 2 52; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG3:%.*]], i32 3 53; CHECK-NEXT: br label [[BB3]] 54; CHECK: bb3: 55; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 0, i8 undef, i8 undef>, [[ENTRY:%.*]] ] 56; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.vector.reduce.or.v4i8(<4 x i8> [[TMP4]]) 57; CHECK-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32 58; CHECK-NEXT: ret i32 [[TMP6]] 59; 60entry: 61 br i1 %cond, label %bb2, label %bb3 62 63bb2: 64 br label %bb3 65 66bb3: 67 %phi0 = phi i8 [ %arg0, %bb2 ], [ 0, %entry ] 68 %phi1 = phi i8 [ %arg1, %bb2 ], [ 0, %entry ] 69 %phi2 = phi i8 [ %arg2, %bb2 ], [ undef, %entry ] 70 %phi3 = phi i8 [ %arg3, %bb2 ], [ undef, %entry ] 71 %zext0 = zext i8 %phi0 to i32 72 %zext1 = zext i8 %phi1 to i32 73 %zext2 = zext i8 %phi2 to i32 74 %zext3 = zext i8 %phi3 to i32 75 %or1 = or i32 %zext0, %zext1 76 %or2 = or i32 %or1, %zext2 77 %or3 = or i32 %or2, %zext3 78 ret i32 %or3 79} 80 81define i32 @phi1UndefInput(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) { 82; CHECK-LABEL: @phi1UndefInput( 83; CHECK-NEXT: entry: 84; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]] 85; CHECK: bb2: 86; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG0:%.*]], i32 0 87; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG1:%.*]], i32 1 88; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG2:%.*]], i32 2 89; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG3:%.*]], i32 3 90; CHECK-NEXT: br label [[BB3]] 91; CHECK: bb3: 92; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 0, i8 0, i8 undef>, [[ENTRY:%.*]] ] 93; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.vector.reduce.or.v4i8(<4 x i8> [[TMP4]]) 94; CHECK-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32 95; CHECK-NEXT: ret i32 [[TMP6]] 96; 97entry: 98 br i1 %cond, label %bb2, label %bb3 99 100bb2: 101 br label %bb3 102 103bb3: 104 %phi0 = phi i8 [ %arg0, %bb2 ], [ 0, %entry ] 105 %phi1 = phi i8 [ %arg1, %bb2 ], [ 0, %entry ] 106 %phi2 = phi i8 [ %arg2, %bb2 ], [ 0, %entry ] 107 %phi3 = phi i8 [ %arg3, %bb2 ], [ undef, %entry ] 108 %zext0 = zext i8 %phi0 to i32 109 %zext1 = zext i8 %phi1 to i32 110 %zext2 = zext i8 %phi2 to i32 111 %zext3 = zext i8 %phi3 to i32 112 %or1 = or i32 %zext0, %zext1 113 %or2 = or i32 %or1, %zext2 114 %or3 = or i32 %or2, %zext3 115 ret i32 %or3 116} 117 118 119define i32 @phi1Undef1PoisonInput(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) { 120; CHECK-LABEL: @phi1Undef1PoisonInput( 121; CHECK-NEXT: entry: 122; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]] 123; CHECK: bb2: 124; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG0:%.*]], i32 0 125; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG1:%.*]], i32 1 126; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG2:%.*]], i32 2 127; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG3:%.*]], i32 3 128; CHECK-NEXT: br label [[BB3]] 129; CHECK: bb3: 130; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 0, i8 poison, i8 undef>, [[ENTRY:%.*]] ] 131; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.vector.reduce.or.v4i8(<4 x i8> [[TMP4]]) 132; CHECK-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32 133; CHECK-NEXT: ret i32 [[TMP6]] 134; 135entry: 136 br i1 %cond, label %bb2, label %bb3 137 138bb2: 139 br label %bb3 140 141bb3: 142 %phi0 = phi i8 [ %arg0, %bb2 ], [ 0, %entry ] 143 %phi1 = phi i8 [ %arg1, %bb2 ], [ 0, %entry ] 144 %phi2 = phi i8 [ %arg2, %bb2 ], [ poison, %entry ] 145 %phi3 = phi i8 [ %arg3, %bb2 ], [ undef, %entry ] 146 %zext0 = zext i8 %phi0 to i32 147 %zext1 = zext i8 %phi1 to i32 148 %zext2 = zext i8 %phi2 to i32 149 %zext3 = zext i8 %phi3 to i32 150 %or1 = or i32 %zext0, %zext1 151 %or2 = or i32 %or1, %zext2 152 %or3 = or i32 %or2, %zext3 153 ret i32 %or3 154} 155 156 157define i32 @phi1Undef2PoisonInputs(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) { 158; CHECK-LABEL: @phi1Undef2PoisonInputs( 159; CHECK-NEXT: entry: 160; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]] 161; CHECK: bb2: 162; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG1:%.*]], i32 0 163; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG0:%.*]], i32 1 164; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG2:%.*]], i32 2 165; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG3:%.*]], i32 3 166; CHECK-NEXT: br label [[BB3]] 167; CHECK: bb3: 168; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 poison, i8 poison, i8 undef>, [[ENTRY:%.*]] ] 169; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.vector.reduce.or.v4i8(<4 x i8> [[TMP4]]) 170; CHECK-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32 171; CHECK-NEXT: ret i32 [[TMP6]] 172; 173entry: 174 br i1 %cond, label %bb2, label %bb3 175 176bb2: 177 br label %bb3 178 179bb3: 180 %phi0 = phi i8 [ %arg0, %bb2 ], [ poison, %entry ] 181 %phi1 = phi i8 [ %arg1, %bb2 ], [ 0, %entry ] 182 %phi2 = phi i8 [ %arg2, %bb2 ], [ poison, %entry ] 183 %phi3 = phi i8 [ %arg3, %bb2 ], [ undef, %entry ] 184 %zext0 = zext i8 %phi0 to i32 185 %zext1 = zext i8 %phi1 to i32 186 %zext2 = zext i8 %phi2 to i32 187 %zext3 = zext i8 %phi3 to i32 188 %or1 = or i32 %zext0, %zext1 189 %or2 = or i32 %or1, %zext2 190 %or3 = or i32 %or2, %zext3 191 ret i32 %or3 192} 193 194define i32 @phi1Undef1PoisonGapInput(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) { 195; CHECK-LABEL: @phi1Undef1PoisonGapInput( 196; CHECK-NEXT: entry: 197; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]] 198; CHECK: bb2: 199; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG1:%.*]], i32 0 200; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG3:%.*]], i32 1 201; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG0:%.*]], i32 2 202; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG2:%.*]], i32 3 203; CHECK-NEXT: br label [[BB3]] 204; CHECK: bb3: 205; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 0, i8 poison, i8 undef>, [[ENTRY:%.*]] ] 206; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.vector.reduce.or.v4i8(<4 x i8> [[TMP4]]) 207; CHECK-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32 208; CHECK-NEXT: ret i32 [[TMP6]] 209; 210entry: 211 br i1 %cond, label %bb2, label %bb3 212 213bb2: 214 br label %bb3 215 216bb3: 217 %phi0 = phi i8 [ %arg0, %bb2 ], [ poison, %entry ] 218 %phi1 = phi i8 [ %arg1, %bb2 ], [ 0, %entry ] 219 %phi2 = phi i8 [ %arg2, %bb2 ], [ undef, %entry ] 220 %phi3 = phi i8 [ %arg3, %bb2 ], [ 0, %entry ] 221 %zext0 = zext i8 %phi0 to i32 222 %zext1 = zext i8 %phi1 to i32 223 %zext2 = zext i8 %phi2 to i32 224 %zext3 = zext i8 %phi3 to i32 225 %or1 = or i32 %zext0, %zext1 226 %or2 = or i32 %or1, %zext2 227 %or3 = or i32 %or2, %zext3 228 ret i32 %or3 229} 230