1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: %if x86-registered-target %{ opt -passes=slp-vectorizer -S -o - -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s %} 3; RUN: %if aarch64-registered-target %{ opt -passes=slp-vectorizer -S -o - -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s %} 4 5%struct.sw = type { float, float, float, float } 6 7define { <2 x float>, <2 x float> } @foo(ptr %v) { 8; CHECK-LABEL: @foo( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr undef, align 4 11; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr undef, align 4 12; CHECK-NEXT: [[TMP3:%.*]] = load <2 x float>, ptr [[V:%.*]], align 16 13; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[TMP3]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1> 14; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> <float undef, float poison, float poison, float undef>, float [[TMP0]], i32 1 15; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> [[TMP4]], float [[TMP1]], i32 2 16; CHECK-NEXT: [[TMP6:%.*]] = fmul <4 x float> [[SHUFFLE]], [[TMP5]] 17; CHECK-NEXT: [[TMP7:%.*]] = fadd <4 x float> [[TMP6]], undef 18; CHECK-NEXT: [[TMP8:%.*]] = fadd <4 x float> [[TMP7]], undef 19; CHECK-NEXT: [[TMP9:%.*]] = fadd <4 x float> [[TMP8]], undef 20; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x float> [[TMP9]], <4 x float> poison, <2 x i32> <i32 1, i32 0> 21; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <4 x float> [[TMP9]], <4 x float> poison, <2 x i32> <i32 2, i32 3> 22; CHECK-NEXT: [[INS1:%.*]] = insertvalue { <2 x float>, <2 x float> } undef, <2 x float> [[TMP10]], 0 23; CHECK-NEXT: [[INS2:%.*]] = insertvalue { <2 x float>, <2 x float> } [[INS1]], <2 x float> [[TMP11]], 1 24; CHECK-NEXT: ret { <2 x float>, <2 x float> } [[INS2]] 25; 26entry: 27 %0 = load float, ptr undef, align 4 28 %1 = load float, ptr %v, align 16 29 %y = getelementptr inbounds %struct.sw, ptr %v, i64 0, i32 1 30 %2 = load float, ptr %y, align 4 31 %mul3 = fmul float %0, %2 32 %add = fadd float undef, %mul3 33 %add6 = fadd float %add, undef 34 %add9 = fadd float %add6, undef 35 %mul12 = fmul float %1, undef 36 %add16 = fadd float %mul12, undef 37 %add20 = fadd float undef, %add16 38 %add24 = fadd float undef, %add20 39 %3 = load float, ptr undef, align 4 40 %mul27 = fmul float %1, %3 41 %add31 = fadd float %mul27, undef 42 %add35 = fadd float undef, %add31 43 %add39 = fadd float undef, %add35 44 %mul45 = fmul float %2, undef 45 %add46 = fadd float undef, %mul45 46 %add50 = fadd float undef, %add46 47 %add54 = fadd float undef, %add50 48 %vec1 = insertelement <2 x float> undef, float %add9, i32 0 49 %vec2 = insertelement <2 x float> %vec1, float %add24, i32 1 50 %vec3 = insertelement <2 x float> undef, float %add39, i32 0 51 %vec4 = insertelement <2 x float> %vec3, float %add54, i32 1 52 %ins1 = insertvalue { <2 x float>, <2 x float> } undef, <2 x float> %vec2, 0 53 %ins2 = insertvalue { <2 x float>, <2 x float> } %ins1, <2 x float> %vec4, 1 54 ret { <2 x float>, <2 x float> } %ins2 55} 56