1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: %if x86-registered-target %{ opt < %s -mtriple=x86_64-unknown -passes=slp-vectorizer -S | FileCheck %s %} 3; RUN: %if aarch64-registered-target %{ opt < %s -mtriple=aarch64-unknown -passes=slp-vectorizer -S | FileCheck %s %} 4 5; Reproducer for an issue discussed here: 6; https://reviews.llvm.org/D108703#2974289 7 8define void @test(ptr nocapture %o, ptr nocapture nonnull readonly dereferenceable(8) %a, ptr nocapture nonnull readonly dereferenceable(8) %b, i32 signext %component) { 9; CHECK-LABEL: @test( 10; CHECK-NEXT: entry: 11; CHECK-NEXT: [[TMP1:%.*]] = load <2 x float>, ptr [[A:%.*]], align 1 12; CHECK-NEXT: [[TMP3:%.*]] = load <2 x float>, ptr [[B:%.*]], align 1 13; CHECK-NEXT: [[TMP4:%.*]] = trunc i32 [[COMPONENT:%.*]] to i8 14; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 2, i32 3, i32 poison, i32 poison> 15; CHECK-NEXT: [[TMP6:%.*]] = extractelement <8 x float> [[TMP5]], i8 [[TMP4]] 16; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> undef, float [[TMP6]], i64 0 17; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x float> [[TMP3]], i32 1 18; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x float> [[TMP7]], float [[TMP8]], i64 1 19; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x float> [[TMP1]], i32 1 20; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x float> [[TMP9]], float [[TMP10]], i64 2 21; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x float> [[TMP11]], float [[TMP6]], i64 3 22; CHECK-NEXT: store <4 x float> [[TMP12]], ptr [[O:%.*]], align 1 23; CHECK-NEXT: ret void 24; 25entry: 26 %0 = load <2 x float>, ptr %a, align 1 27 %1 = load <2 x float>, ptr %b, align 1 28 %2 = trunc i32 %component to i8 29 %3 = shufflevector <2 x float> %0, <2 x float> %1, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 2, i32 3, i32 undef, i32 undef> 30 %4 = extractelement <8 x float> %3, i8 %2 31 %5 = insertelement <4 x float> undef, float %4, i64 0 32 %6 = extractelement <2 x float> %1, i32 1 33 %7 = insertelement <4 x float> %5, float %6, i64 1 34 %8 = extractelement <2 x float> %0, i32 1 35 %9 = insertelement <4 x float> %7, float %8, i64 2 36 %10 = insertelement <4 x float> %9, float %4, i64 3 37 store <4 x float> %10, ptr %o, align 1 38 ret void 39} 40