xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll (revision e0bd8d3485075d24ecff2b4f5d9e2117853bd08b) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: %if x86-registered-target %{ opt < %s -passes=slp-vectorizer -slp-min-tree-size=2 -slp-threshold=-1000 -slp-max-look-ahead-depth=1 -slp-schedule-budget=27 -S -mtriple=x86_64-unknown-linux-gnu | FileCheck %s %}
3; RUN: %if aarch64-registered-target %{ opt < %s -passes=slp-vectorizer -slp-min-tree-size=2 -slp-threshold=-1000 -slp-max-look-ahead-depth=1 -slp-schedule-budget=27 -S -mtriple=aarch64-unknown-linux-gnu | FileCheck %s %}
4
5define void @exceed(double %0, double %1) {
6; CHECK-LABEL: @exceed(
7; CHECK-NEXT:  entry:
8; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <2 x double> poison, double [[TMP0:%.*]], i32 0
9; CHECK-NEXT:    [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> poison, <2 x i32> zeroinitializer
10; CHECK-NEXT:    [[TMP4:%.*]] = insertelement <2 x double> poison, double [[TMP1:%.*]], i32 0
11; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <2 x double> [[TMP4]], <2 x double> poison, <2 x i32> zeroinitializer
12; CHECK-NEXT:    [[TMP6:%.*]] = fdiv fast <2 x double> [[TMP3]], [[TMP5]]
13; CHECK-NEXT:    [[TMP7:%.*]] = extractelement <2 x double> [[TMP6]], i32 1
14; CHECK-NEXT:    [[IX:%.*]] = fmul double [[TMP7]], undef
15; CHECK-NEXT:    [[IXX0:%.*]] = fsub double undef, undef
16; CHECK-NEXT:    [[IXX1:%.*]] = fsub double undef, undef
17; CHECK-NEXT:    [[IXX2:%.*]] = fsub double undef, undef
18; CHECK-NEXT:    [[IXX3:%.*]] = fsub double undef, undef
19; CHECK-NEXT:    [[IXX4:%.*]] = fsub double undef, undef
20; CHECK-NEXT:    [[IXX5:%.*]] = fsub double undef, undef
21; CHECK-NEXT:    [[IX1:%.*]] = fmul double [[TMP7]], undef
22; CHECK-NEXT:    [[IXX10:%.*]] = fsub double undef, undef
23; CHECK-NEXT:    [[IXX11:%.*]] = fsub double undef, undef
24; CHECK-NEXT:    [[IXX12:%.*]] = fsub double undef, undef
25; CHECK-NEXT:    [[IXX13:%.*]] = fsub double undef, undef
26; CHECK-NEXT:    [[IXX14:%.*]] = fsub double undef, undef
27; CHECK-NEXT:    [[IXX15:%.*]] = fsub double undef, undef
28; CHECK-NEXT:    [[IXX20:%.*]] = fsub double undef, undef
29; CHECK-NEXT:    [[IXX21:%.*]] = fsub double undef, undef
30; CHECK-NEXT:    [[IXX22:%.*]] = fsub double undef, undef
31; CHECK-NEXT:    [[TMP8:%.*]] = extractelement <2 x double> [[TMP6]], i32 0
32; CHECK-NEXT:    [[IX2:%.*]] = fmul double [[TMP8]], [[TMP8]]
33; CHECK-NEXT:    [[TMP9:%.*]] = fadd fast <2 x double> [[TMP3]], [[TMP5]]
34; CHECK-NEXT:    [[TMP10:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> [[TMP5]], <2 x i32> <i32 0, i32 2>
35; CHECK-NEXT:    [[TMP11:%.*]] = fadd fast <2 x double> [[TMP6]], [[TMP10]]
36; CHECK-NEXT:    [[TMP12:%.*]] = fmul fast <2 x double> [[TMP11]], [[TMP9]]
37; CHECK-NEXT:    [[IXX101:%.*]] = fsub double undef, undef
38; CHECK-NEXT:    [[TMP13:%.*]] = shufflevector <2 x double> [[TMP6]], <2 x double> [[TMP5]], <2 x i32> <i32 1, i32 2>
39; CHECK-NEXT:    [[TMP14:%.*]] = fmul fast <2 x double> [[TMP13]], undef
40; CHECK-NEXT:    switch i32 undef, label [[BB1:%.*]] [
41; CHECK-NEXT:    i32 0, label [[BB2:%.*]]
42; CHECK-NEXT:    ]
43; CHECK:       bb1:
44; CHECK-NEXT:    br label [[LABEL:%.*]]
45; CHECK:       bb2:
46; CHECK-NEXT:    br label [[LABEL]]
47; CHECK:       label:
48; CHECK-NEXT:    [[TMP15:%.*]] = phi <2 x double> [ [[TMP12]], [[BB1]] ], [ [[TMP14]], [[BB2]] ]
49; CHECK-NEXT:    ret void
50;
51entry:
52  %i10 = fdiv fast double %0, %1
53  %ix = fmul double %i10, undef
54  %ixx0 = fsub double undef, undef
55  %ixx1 = fsub double undef, undef
56  %ixx2 = fsub double undef, undef
57  %ixx3 = fsub double undef, undef
58  %ixx4 = fsub double undef, undef
59  %ixx5 = fsub double undef, undef
60  %ix1 = fmul double %i10, undef
61  %ixx10 = fsub double undef, undef
62  %ixx11 = fsub double undef, undef
63  %ixx12 = fsub double undef, undef
64  %ixx13 = fsub double undef, undef
65  %ixx14 = fsub double undef, undef
66  %ixx15 = fsub double undef, undef
67  %ixx20 = fsub double undef, undef
68  %ixx21 = fsub double undef, undef
69  %ixx22 = fsub double undef, undef
70  %i11 = fdiv fast double %0, %1
71  %ix2 = fmul double %i11, %i11
72  %tmp1 = fadd fast double %i11, %0
73  %tmp2 = fadd fast double %0, %1
74  %tmp5 = fmul fast double %tmp1, %tmp2
75  %tmp15 = fadd fast double %i10, %1
76  %tmp25 = fadd fast double %0, %1
77  %tmp6 = fmul fast double %tmp15, %tmp25
78  %tmp555 = fmul fast double %i10, undef
79  %ixx101 = fsub double undef, undef
80  %tmp666 = fmul fast double %1, undef
81  switch i32 undef, label %bb1 [
82  i32 0, label %bb2
83  ]
84
85bb1:                                              ; preds = %entry
86  br label %label
87
88bb2:                                              ; preds = %entry
89  br label %label
90
91label:                                            ; preds = %bb2, %bb1
92  %phi1 = phi double [ %tmp5, %bb1 ], [ %tmp555, %bb2 ]
93  %phi2 = phi double [ %tmp6, %bb1 ], [ %tmp666, %bb2 ]
94  ret void
95}
96