1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=slp-vectorizer -S < %s | FileCheck %s 3 4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 5target triple = "aarch64" 6 7define <vscale x 8 x i32> @scalable(i1 %c, i32 %srcALen, i32 %srcBLen) { 8; CHECK-LABEL: @scalable( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 11; CHECK: if.then: 12; CHECK-NEXT: br label [[IF_END12:%.*]] 13; CHECK: if.else: 14; CHECK-NEXT: br label [[IF_END12]] 15; CHECK: if.end12: 16; CHECK-NEXT: [[SRCALEN_ADDR_0:%.*]] = phi i32 [ [[SRCALEN:%.*]], [[IF_THEN]] ], [ [[SRCBLEN:%.*]], [[IF_ELSE]] ] 17; CHECK-NEXT: [[SRCBLEN_ADDR_0:%.*]] = phi i32 [ [[SRCBLEN]], [[IF_THEN]] ], [ [[SRCALEN]], [[IF_ELSE]] ] 18; CHECK-NEXT: [[BROADCAST_SPLATINSERT78:%.*]] = insertelement <vscale x 8 x i32> poison, i32 [[SRCBLEN_ADDR_0]], i64 0 19; CHECK-NEXT: [[BROADCAST_SPLATINSERT82:%.*]] = insertelement <vscale x 8 x i32> poison, i32 [[SRCALEN_ADDR_0]], i64 0 20; CHECK-NEXT: [[BROADCAST_SPLAT83:%.*]] = shufflevector <vscale x 8 x i32> [[BROADCAST_SPLATINSERT82]], <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer 21; CHECK-NEXT: ret <vscale x 8 x i32> [[BROADCAST_SPLAT83]] 22; 23entry: 24 br i1 %c, label %if.then, label %if.else 25 26if.then: ; preds = %entry 27 br label %if.end12 28 29if.else: ; preds = %entry 30 br label %if.end12 31 32if.end12: ; preds = %if.else, %if.then 33 %srcALen.addr.0 = phi i32 [ %srcALen, %if.then ], [ %srcBLen, %if.else ] 34 %srcBLen.addr.0 = phi i32 [ %srcBLen, %if.then ], [ %srcALen, %if.else ] 35 %broadcast.splatinsert78 = insertelement <vscale x 8 x i32> poison, i32 %srcBLen.addr.0, i64 0 36 %broadcast.splatinsert82 = insertelement <vscale x 8 x i32> poison, i32 %srcALen.addr.0, i64 0 37 %broadcast.splat83 = shufflevector <vscale x 8 x i32> %broadcast.splatinsert82, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer 38 ret <vscale x 8 x i32> %broadcast.splat83 39} 40 41define <vscale x 8 x i32> @multiuse(i1 %c, i32 %srcALen, i32 %srcBLen) { 42; CHECK-LABEL: @multiuse( 43; CHECK-NEXT: entry: 44; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 45; CHECK: if.then: 46; CHECK-NEXT: br label [[IF_END12:%.*]] 47; CHECK: if.else: 48; CHECK-NEXT: br label [[IF_END12]] 49; CHECK: if.end12: 50; CHECK-NEXT: [[SRCALEN_ADDR_0:%.*]] = phi i32 [ [[SRCALEN:%.*]], [[IF_THEN]] ], [ [[SRCBLEN:%.*]], [[IF_ELSE]] ] 51; CHECK-NEXT: [[SRCBLEN_ADDR_0:%.*]] = phi i32 [ [[SRCBLEN]], [[IF_THEN]] ], [ [[SRCALEN]], [[IF_ELSE]] ] 52; CHECK-NEXT: [[BROADCAST_SPLATINSERT78:%.*]] = insertelement <vscale x 8 x i32> poison, i32 [[SRCBLEN_ADDR_0]], i64 0 53; CHECK-NEXT: [[BROADCAST_SPLATINSERT82:%.*]] = insertelement <vscale x 8 x i32> poison, i32 [[SRCALEN_ADDR_0]], i64 0 54; CHECK-NEXT: [[BROADCAST_SPLAT83:%.*]] = shufflevector <vscale x 8 x i32> [[BROADCAST_SPLATINSERT82]], <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer 55; CHECK-NEXT: [[X:%.*]] = add i32 [[SRCALEN_ADDR_0]], [[SRCBLEN_ADDR_0]] 56; CHECK-NEXT: [[BROADCAST_SPLAT84:%.*]] = insertelement <vscale x 8 x i32> [[BROADCAST_SPLAT83]], i32 [[SRCBLEN_ADDR_0]], i64 1 57; CHECK-NEXT: ret <vscale x 8 x i32> [[BROADCAST_SPLAT84]] 58; 59entry: 60 br i1 %c, label %if.then, label %if.else 61 62if.then: ; preds = %entry 63 br label %if.end12 64 65if.else: ; preds = %entry 66 br label %if.end12 67 68if.end12: ; preds = %if.else, %if.then 69 %srcALen.addr.0 = phi i32 [ %srcALen, %if.then ], [ %srcBLen, %if.else ] 70 %srcBLen.addr.0 = phi i32 [ %srcBLen, %if.then ], [ %srcALen, %if.else ] 71 %broadcast.splatinsert78 = insertelement <vscale x 8 x i32> poison, i32 %srcBLen.addr.0, i64 0 72 %broadcast.splatinsert82 = insertelement <vscale x 8 x i32> poison, i32 %srcALen.addr.0, i64 0 73 %broadcast.splat83 = shufflevector <vscale x 8 x i32> %broadcast.splatinsert82, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer 74 %x = add i32 %srcALen.addr.0, %srcBLen.addr.0 75 %broadcast.splat84 = insertelement <vscale x 8 x i32> %broadcast.splat83, i32 %srcBLen.addr.0, i64 1 76 ret <vscale x 8 x i32> %broadcast.splat84 77} 78 79