1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=reassociate -S | FileCheck %s 3 4define i32 @shl_add(i8 %x) { 5; CHECK-LABEL: @shl_add( 6; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[X:%.*]] to i32 7; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i32 [[CONV]], 8 8; CHECK-NEXT: [[SHL2:%.*]] = shl nuw nsw i32 [[CONV]], 16 9; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[SHL]], [[SHL2]] 10; CHECK-NEXT: ret i32 [[ADD]] 11; 12 %conv = zext i8 %x to i32 13 %shl = shl nuw nsw i32 %conv, 8 14 %shl2 = shl nuw nsw i32 %conv, 16 15 %add = or i32 %shl, %shl2 16 ret i32 %add 17} 18 19; If we don't know that operands have no common bits set, 20; we can't convert the `or` into an `add`. 21define i32 @test1(i32 %a, i32 %b) { 22; CHECK-LABEL: @test1( 23; CHECK-NEXT: [[C:%.*]] = or i32 [[B:%.*]], [[A:%.*]] 24; CHECK-NEXT: [[C_PLUS_ONE:%.*]] = add i32 [[C]], 1 25; CHECK-NEXT: ret i32 [[C_PLUS_ONE]] 26; 27 %c = or i32 %a, %b 28 %c.plus.one = add i32 %c, 1 29 ret i32 %c.plus.one 30} 31 32; But if we *do* know that operands have no common bits set, 33; we *can* convert the `or` into an `add`. 34define i32 @test2(i32 %x, i32 %y) { 35; CHECK-LABEL: @test2( 36; CHECK-NEXT: [[X_NUMLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true), [[RNG0:!range !.*]] 37; CHECK-NEXT: [[RES:%.*]] = add nuw nsw i32 [[X_NUMLZ]], -32 38; CHECK-NEXT: [[RES_PLUS_ONE:%.*]] = add i32 [[RES]], [[Y:%.*]] 39; CHECK-NEXT: ret i32 [[RES_PLUS_ONE]] 40; 41 %x.numlz = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true), !range !0 42 %res = or i32 %x.numlz, -32 43 %res.plus.one = add i32 %res, %y 44 ret i32 %res.plus.one 45} 46 47; And that allows reassociation in general. 48define i32 @test3(i32 %x, i32 %bit) { 49; CHECK-LABEL: @test3( 50; CHECK-NEXT: [[X_NUMLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true), [[RNG0]] 51; CHECK-NEXT: [[BIT_PLUS_ONE:%.*]] = add i32 [[BIT:%.*]], -31 52; CHECK-NEXT: [[RES:%.*]] = add i32 [[BIT_PLUS_ONE]], [[X_NUMLZ]] 53; CHECK-NEXT: ret i32 [[RES]] 54; 55 %x.numlz = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true), !range !0 56 %zero.minus.x.numactivebits = or i32 %x.numlz, -32 57 %bit.plus.one = add i32 %bit, 1 58 %res = add i32 %bit.plus.one, %zero.minus.x.numactivebits 59 ret i32 %res 60} 61 62; Test that disjoint allow reassociation. 63define i32 @test4(i32 %a, i32 %b) { 64; CHECK-LABEL: @test4( 65; CHECK-NEXT: [[C:%.*]] = add i32 [[A:%.*]], 1 66; CHECK-NEXT: [[C_PLUS_ONE:%.*]] = add i32 [[C]], [[B:%.*]] 67; CHECK-NEXT: ret i32 [[C_PLUS_ONE]] 68; 69 %c = or disjoint i32 %a, %b 70 %c.plus.one = add i32 %c, 1 71 ret i32 %c.plus.one 72} 73 74declare i32 @llvm.ctlz.i32(i32, i1 immarg) #2 75 76!0 = !{i32 0, i32 33} 77