xref: /llvm-project/llvm/test/Transforms/PhaseOrdering/basic.ll (revision 462cb3cd6cecd0511ecaf0e3ebcaba455ece587d)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -O3 -S < %s | FileCheck %s
3
4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
5target triple = "x86_64-apple-macosx10.6.7"
6
7declare ptr @malloc(i64)
8declare void @free(ptr)
9
10; PR2338
11define void @test1() nounwind ssp {
12; CHECK-LABEL: @test1(
13; CHECK-NEXT:    ret void
14;
15  %retval = alloca i32, align 4
16  %i = alloca ptr, align 8
17  %call = call ptr @malloc(i64 1)
18  store ptr %call, ptr %i, align 8
19  %tmp = load ptr, ptr %i, align 8
20  store i8 1, ptr %tmp
21  %tmp1 = load ptr, ptr %i, align 8
22  call void @free(ptr %tmp1)
23  ret void
24
25}
26
27; This function exposes a phase ordering problem when InstCombine is
28; turning %add into a bitmask, making it difficult to spot a 0 return value.
29;
30; It it also important that %add is expressed as a multiple of %div so scalar
31; evolution can recognize it.
32define i32 @test2(i32 %a, ptr %p) nounwind uwtable ssp {
33; CHECK-LABEL: @test2(
34; CHECK-NEXT:  entry:
35; CHECK-NEXT:    [[DIV1:%.*]] = lshr i32 [[A:%.*]], 2
36; CHECK-NEXT:    store i32 [[DIV1]], ptr [[P:%.*]], align 4
37; CHECK-NEXT:    [[ADD:%.*]] = shl nuw nsw i32 [[DIV1]], 1
38; CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw i8, ptr [[P]], i64 4
39; CHECK-NEXT:    store i32 [[ADD]], ptr [[ARRAYIDX1]], align 4
40; CHECK-NEXT:    ret i32 0
41;
42entry:
43  %div = udiv i32 %a, 4
44  store i32 %div, ptr %p, align 4
45  %add = add i32 %div, %div
46  %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 1
47  store i32 %add, ptr %arrayidx1, align 4
48  %arrayidx2 = getelementptr inbounds i32, ptr %p, i64 1
49  %0 = load i32, ptr %arrayidx2, align 4
50  %1 = load i32, ptr %p, align 4
51  %mul = mul i32 2, %1
52  %sub = sub i32 %0, %mul
53  ret i32 %sub
54
55}
56