1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s --check-prefix=SIMPLIFYCFG 3; RUN: opt -passes=instcombine -S < %s | FileCheck %s --check-prefix=INSTCOMBINEONLY 4; RUN: opt -passes=instcombine,simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGONLY 5; RUN: opt -passes=instcombine,simplifycfg,instcombine -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGINSTCOMBINE 6; RUN: opt -passes=instcombine,simplifycfg -simplifycfg-require-and-preserve-domtree=1 -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGONLY 7; RUN: opt -passes=instcombine,simplifycfg,instcombine -simplifycfg-require-and-preserve-domtree=1 -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefix=INSTCOMBINESIMPLIFYCFGINSTCOMBINE 8 9target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 10target triple = "x86_64-pc-linux-gnu" 11 12; #include <limits> 13; #include <cstdint> 14; 15; using size_type = std::size_t; 16; bool will_not_overflow(size_type size, size_type nmemb) { 17; return (size != 0 && (nmemb > std::numeric_limits<size_type>::max() / size)); 18; } 19 20define i1 @will_not_overflow(i64 %arg, i64 %arg1) { 21; SIMPLIFYCFG-LABEL: @will_not_overflow( 22; SIMPLIFYCFG-NEXT: bb: 23; SIMPLIFYCFG-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 24; SIMPLIFYCFG-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 25; SIMPLIFYCFG: bb2: 26; SIMPLIFYCFG-NEXT: [[T3:%.*]] = udiv i64 -1, [[ARG]] 27; SIMPLIFYCFG-NEXT: [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]] 28; SIMPLIFYCFG-NEXT: br label [[BB5]] 29; SIMPLIFYCFG: bb5: 30; SIMPLIFYCFG-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ] 31; SIMPLIFYCFG-NEXT: ret i1 [[T6]] 32; 33; INSTCOMBINEONLY-LABEL: @will_not_overflow( 34; INSTCOMBINEONLY-NEXT: bb: 35; INSTCOMBINEONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 36; INSTCOMBINEONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 37; INSTCOMBINEONLY: bb2: 38; INSTCOMBINEONLY-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 39; INSTCOMBINEONLY-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 1 40; INSTCOMBINEONLY-NEXT: br label [[BB5]] 41; INSTCOMBINEONLY: bb5: 42; INSTCOMBINEONLY-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[MUL_OV]], [[BB2]] ] 43; INSTCOMBINEONLY-NEXT: ret i1 [[T6]] 44; 45; INSTCOMBINESIMPLIFYCFGONLY-LABEL: @will_not_overflow( 46; INSTCOMBINESIMPLIFYCFGONLY-NEXT: bb: 47; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 48; INSTCOMBINESIMPLIFYCFGONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 49; INSTCOMBINESIMPLIFYCFGONLY: bb2: 50; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 51; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 1 52; INSTCOMBINESIMPLIFYCFGONLY-NEXT: br label [[BB5]] 53; INSTCOMBINESIMPLIFYCFGONLY: bb5: 54; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[MUL_OV]], [[BB2]] ] 55; INSTCOMBINESIMPLIFYCFGONLY-NEXT: ret i1 [[T6]] 56; 57; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-LABEL: @will_not_overflow( 58; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: bb: 59; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 60; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 61; INSTCOMBINESIMPLIFYCFGINSTCOMBINE: bb2: 62; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 63; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 1 64; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: br label [[BB5]] 65; INSTCOMBINESIMPLIFYCFGINSTCOMBINE: bb5: 66; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[MUL_OV]], [[BB2]] ] 67; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[T6]] 68; 69bb: 70 %t0 = icmp eq i64 %arg, 0 71 br i1 %t0, label %bb5, label %bb2 72 73bb2: ; preds = %bb 74 %t3 = udiv i64 -1, %arg 75 %t4 = icmp ult i64 %t3, %arg1 76 br label %bb5 77 78bb5: ; preds = %bb2, %bb 79 %t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ] 80 ret i1 %t6 81} 82 83; Same as @will_not_overflow, but inverting return value. 84 85define i1 @will_overflow(i64 %arg, i64 %arg1) { 86; SIMPLIFYCFG-LABEL: @will_overflow( 87; SIMPLIFYCFG-NEXT: bb: 88; SIMPLIFYCFG-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 89; SIMPLIFYCFG-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 90; SIMPLIFYCFG: bb2: 91; SIMPLIFYCFG-NEXT: [[T3:%.*]] = udiv i64 -1, [[ARG]] 92; SIMPLIFYCFG-NEXT: [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]] 93; SIMPLIFYCFG-NEXT: br label [[BB5]] 94; SIMPLIFYCFG: bb5: 95; SIMPLIFYCFG-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ] 96; SIMPLIFYCFG-NEXT: [[T7:%.*]] = xor i1 [[T6]], true 97; SIMPLIFYCFG-NEXT: ret i1 [[T7]] 98; 99; INSTCOMBINEONLY-LABEL: @will_overflow( 100; INSTCOMBINEONLY-NEXT: bb: 101; INSTCOMBINEONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 102; INSTCOMBINEONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 103; INSTCOMBINEONLY: bb2: 104; INSTCOMBINEONLY-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 105; INSTCOMBINEONLY-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 1 106; INSTCOMBINEONLY-NEXT: [[PHI_BO:%.*]] = xor i1 [[MUL_OV]], true 107; INSTCOMBINEONLY-NEXT: br label [[BB5]] 108; INSTCOMBINEONLY: bb5: 109; INSTCOMBINEONLY-NEXT: [[T6:%.*]] = phi i1 [ true, [[BB:%.*]] ], [ [[PHI_BO]], [[BB2]] ] 110; INSTCOMBINEONLY-NEXT: ret i1 [[T6]] 111; 112; INSTCOMBINESIMPLIFYCFGONLY-LABEL: @will_overflow( 113; INSTCOMBINESIMPLIFYCFGONLY-NEXT: bb: 114; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 115; INSTCOMBINESIMPLIFYCFGONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 116; INSTCOMBINESIMPLIFYCFGONLY: bb2: 117; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 118; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 1 119; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[PHI_BO:%.*]] = xor i1 [[MUL_OV]], true 120; INSTCOMBINESIMPLIFYCFGONLY-NEXT: br label [[BB5]] 121; INSTCOMBINESIMPLIFYCFGONLY: bb5: 122; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T6:%.*]] = phi i1 [ true, [[BB:%.*]] ], [ [[PHI_BO]], [[BB2]] ] 123; INSTCOMBINESIMPLIFYCFGONLY-NEXT: ret i1 [[T6]] 124; 125; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-LABEL: @will_overflow( 126; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: bb: 127; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 128; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 129; INSTCOMBINESIMPLIFYCFGINSTCOMBINE: bb2: 130; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 131; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[MUL_OV:%.*]] = extractvalue { i64, i1 } [[MUL]], 1 132; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[PHI_BO:%.*]] = xor i1 [[MUL_OV]], true 133; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: br label [[BB5]] 134; INSTCOMBINESIMPLIFYCFGINSTCOMBINE: bb5: 135; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[T6:%.*]] = phi i1 [ true, [[BB:%.*]] ], [ [[PHI_BO]], [[BB2]] ] 136; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[T6]] 137; 138bb: 139 %t0 = icmp eq i64 %arg, 0 140 br i1 %t0, label %bb5, label %bb2 141 142bb2: ; preds = %bb 143 %t3 = udiv i64 -1, %arg 144 %t4 = icmp ult i64 %t3, %arg1 145 br label %bb5 146 147bb5: ; preds = %bb2, %bb 148 %t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ] 149 %t7 = xor i1 %t6, true 150 ret i1 %t7 151} 152