xref: /llvm-project/llvm/test/Transforms/PhaseOrdering/X86/merge-functions3.ll (revision 462cb3cd6cecd0511ecaf0e3ebcaba455ece587d)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2; RUN: opt -passes="default<O3>" -enable-merge-functions -S < %s | FileCheck %s
3
4target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
5target triple = "x86_64-apple-macosx12.0.0"
6
7@switch.table.f = private unnamed_addr constant [8 x i32] [i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 1], align 4
8@switch.table.g = private unnamed_addr constant [8 x i32] [i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 1], align 4
9
10define range(i32 0, 2) i32 @f(i32 noundef %x) local_unnamed_addr {
11; CHECK-LABEL: define range(i32 0, 2) i32 @f(
12; CHECK-SAME: i32 noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
13; CHECK-NEXT:  [[ENTRY:.*]]:
14; CHECK-NEXT:    [[TMP0:%.*]] = icmp ult i32 [[X]], 8
15; CHECK-NEXT:    br i1 [[TMP0]], label %[[SWITCH_LOOKUP:.*]], label %[[SW_EPILOG:.*]]
16; CHECK:       [[SWITCH_LOOKUP]]:
17; CHECK-NEXT:    [[TMP1:%.*]] = zext nneg i32 [[X]] to i64
18; CHECK-NEXT:    [[SWITCH_GEP:%.*]] = getelementptr inbounds nuw [8 x i32], ptr @switch.table.g, i64 0, i64 [[TMP1]]
19; CHECK-NEXT:    [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
20; CHECK-NEXT:    br label %[[SW_EPILOG]]
21; CHECK:       [[SW_EPILOG]]:
22; CHECK-NEXT:    [[X_ADDR_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], %[[SWITCH_LOOKUP]] ], [ 0, %[[ENTRY]] ]
23; CHECK-NEXT:    ret i32 [[X_ADDR_0]]
24;
25entry:
26  %0 = icmp ult i32 %x, 8
27  br i1 %0, label %switch.lookup, label %sw.epilog
28
29switch.lookup:                                    ; preds = %entry
30  %1 = zext nneg i32 %x to i64
31  %switch.gep = getelementptr inbounds [8 x i32], ptr @switch.table.f, i64 0, i64 %1
32  %switch.load = load i32, ptr %switch.gep, align 4
33  br label %sw.epilog
34
35sw.epilog:                                        ; preds = %entry, %switch.lookup
36  %x.addr.0 = phi i32 [ %switch.load, %switch.lookup ], [ 0, %entry ]
37  ret i32 %x.addr.0
38}
39
40define range(i32 0, 2) i32 @g(i32 noundef %x) local_unnamed_addr {
41; CHECK-LABEL: define range(i32 0, 2) i32 @g(
42; CHECK-SAME: i32 noundef [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
43; CHECK-NEXT:    [[TMP2:%.*]] = tail call range(i32 0, 2) i32 @f(i32 noundef [[TMP0]]) #[[ATTR0]]
44; CHECK-NEXT:    ret i32 [[TMP2]]
45;
46entry:
47  %0 = icmp ult i32 %x, 8
48  br i1 %0, label %switch.lookup, label %sw.epilog
49
50switch.lookup:                                    ; preds = %entry
51  %1 = zext nneg i32 %x to i64
52  %switch.gep = getelementptr inbounds [8 x i32], ptr @switch.table.g, i64 0, i64 %1
53  %switch.load = load i32, ptr %switch.gep, align 4
54  br label %sw.epilog
55
56sw.epilog:                                        ; preds = %entry, %switch.lookup
57  %x.addr.0 = phi i32 [ %switch.load, %switch.lookup ], [ 0, %entry ]
58  ret i32 %x.addr.0
59}
60