1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -O2 -S | FileCheck %s 3; RUN: opt < %s -passes="default<O2>" -S | FileCheck %s 4 5target triple = "x86_64--" 6target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 7 8declare void @llvm.x86.avx.maskstore.ps.256(ptr, <8 x i32>, <8 x float>) #0 9declare void @llvm.masked.store.v8f32.p0(<8 x float>, ptr, i32, <8 x i1>) 10 11; PR11210: If we have been able to replace a AVX/AVX2 masked store with a 12; generic masked store intrinsic, then we should be able to remove dead 13; masked stores. 14 15define void @PR11210_v8f32_maskstore_maskstore(ptr %ptr, <8 x float> %x, <8 x float> %y, <8 x i32> %src) { 16; CHECK-LABEL: @PR11210_v8f32_maskstore_maskstore( 17; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <8 x i32> [[SRC:%.*]], zeroinitializer 18; CHECK-NEXT: tail call void @llvm.masked.store.v8f32.p0(<8 x float> [[Y:%.*]], ptr [[PTR:%.*]], i32 1, <8 x i1> [[CMP]]) 19; CHECK-NEXT: ret void 20; 21 %cmp = icmp sgt <8 x i32> %src, zeroinitializer 22 %mask = sext <8 x i1> %cmp to <8 x i32> 23 call void @llvm.x86.avx.maskstore.ps.256(ptr %ptr, <8 x i32> %mask, <8 x float> %x) 24 call void @llvm.x86.avx.maskstore.ps.256(ptr %ptr, <8 x i32> %mask, <8 x float> %y) 25 ret void 26} 27 28; The contents of %mask are unknown so we don't replace this with a generic masked.store. 29define void @PR11210_v8f32_maskstore_maskstore_raw_mask(ptr %ptr, <8 x float> %x, <8 x float> %y, <8 x i32> %mask) { 30; CHECK-LABEL: @PR11210_v8f32_maskstore_maskstore_raw_mask( 31; CHECK-NEXT: tail call void @llvm.x86.avx.maskstore.ps.256(ptr [[PTR:%.*]], <8 x i32> [[MASK:%.*]], <8 x float> [[X:%.*]]) 32; CHECK-NEXT: tail call void @llvm.x86.avx.maskstore.ps.256(ptr [[PTR]], <8 x i32> [[MASK]], <8 x float> [[Y:%.*]]) 33; CHECK-NEXT: ret void 34; 35 call void @llvm.x86.avx.maskstore.ps.256(ptr %ptr, <8 x i32> %mask, <8 x float> %x) 36 call void @llvm.x86.avx.maskstore.ps.256(ptr %ptr, <8 x i32> %mask, <8 x float> %y) 37 ret void 38} 39 40; Mix AVX and generic masked stores. 41define void @PR11210_v8f32_mstore_maskstore(ptr %ptr, <8 x float> %x, <8 x float> %y, <8 x i32> %src) { 42; CHECK-LABEL: @PR11210_v8f32_mstore_maskstore( 43; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <8 x i32> [[SRC:%.*]], zeroinitializer 44; CHECK-NEXT: tail call void @llvm.masked.store.v8f32.p0(<8 x float> [[Y:%.*]], ptr [[PTR:%.*]], i32 1, <8 x i1> [[CMP]]) 45; CHECK-NEXT: ret void 46; 47 %cmp = icmp sgt <8 x i32> %src, zeroinitializer 48 %mask = sext <8 x i1> %cmp to <8 x i32> 49 tail call void @llvm.masked.store.v8f32.p0(<8 x float> %x, ptr %ptr, i32 1, <8 x i1> %cmp) 50 call void @llvm.x86.avx.maskstore.ps.256(ptr %ptr, <8 x i32> %mask, <8 x float> %y) 51 ret void 52} 53 54