xref: /llvm-project/llvm/test/Transforms/PhaseOrdering/X86/loadcombine.ll (revision 7ec4f6094e54911794c142b5d88496a220d807d6) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -O3 -S -mtriple=x86_64-- -mattr=+avx2 < %s | FileCheck %s
3
4define i32 @loadCombine_4consecutive_1234(ptr %p) {
5; CHECK-LABEL: @loadCombine_4consecutive_1234(
6; CHECK-NEXT:    [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
7; CHECK-NEXT:    ret i32 [[L1]]
8;
9  %p1 = getelementptr i8, ptr %p, i32 1
10  %p2 = getelementptr i8, ptr %p, i32 2
11  %p3 = getelementptr i8, ptr %p, i32 3
12  %l1 = load i8, ptr %p
13  %l2 = load i8, ptr %p1
14  %l3 = load i8, ptr %p2
15  %l4 = load i8, ptr %p3
16
17  %e1 = zext i8 %l1 to i32
18  %e2 = zext i8 %l2 to i32
19  %e3 = zext i8 %l3 to i32
20  %e4 = zext i8 %l4 to i32
21
22  %s2 = shl i32 %e2, 8
23  %s3 = shl i32 %e3, 16
24  %s4 = shl i32 %e4, 24
25
26  %o1 = or i32 %e1, %s2
27  %o2 = or i32 %o1, %s3
28  %o3 = or i32 %o2, %s4
29  ret i32 %o3
30}
31
32define i32 @loadCombine_4consecutive_1243(ptr %p) {
33; CHECK-LABEL: @loadCombine_4consecutive_1243(
34; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 2
35; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
36; CHECK-NEXT:    [[L1:%.*]] = load i16, ptr [[P]], align 1
37; CHECK-NEXT:    [[TMP1:%.*]] = zext i16 [[L1]] to i32
38; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
39; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
40; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
41; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
42; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
43; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
44; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[S3]], [[TMP1]]
45; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
46; CHECK-NEXT:    ret i32 [[O3]]
47;
48  %p1 = getelementptr i8, ptr %p, i32 1
49  %p2 = getelementptr i8, ptr %p, i32 2
50  %p3 = getelementptr i8, ptr %p, i32 3
51  %l1 = load i8, ptr %p
52  %l2 = load i8, ptr %p1
53  %l3 = load i8, ptr %p2
54  %l4 = load i8, ptr %p3
55
56  %e1 = zext i8 %l1 to i32
57  %e2 = zext i8 %l2 to i32
58  %e3 = zext i8 %l3 to i32
59  %e4 = zext i8 %l4 to i32
60
61  %s2 = shl i32 %e2, 8
62  %s3 = shl i32 %e3, 16
63  %s4 = shl i32 %e4, 24
64
65  %o1 = or i32 %e1, %s2
66  %o2 = or i32 %o1, %s4
67  %o3 = or i32 %o2, %s3
68  ret i32 %o3
69}
70
71define i32 @loadCombine_4consecutive_1324(ptr %p) {
72; CHECK-LABEL: @loadCombine_4consecutive_1324(
73; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
74; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
75; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
76; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
77; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
78; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
79; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
80; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
81; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
82; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
83; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
84; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
85; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
86; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
87; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
88; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
89; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
90; CHECK-NEXT:    ret i32 [[O3]]
91;
92  %p1 = getelementptr i8, ptr %p, i32 1
93  %p2 = getelementptr i8, ptr %p, i32 2
94  %p3 = getelementptr i8, ptr %p, i32 3
95  %l1 = load i8, ptr %p
96  %l2 = load i8, ptr %p1
97  %l3 = load i8, ptr %p2
98  %l4 = load i8, ptr %p3
99
100  %e1 = zext i8 %l1 to i32
101  %e2 = zext i8 %l2 to i32
102  %e3 = zext i8 %l3 to i32
103  %e4 = zext i8 %l4 to i32
104
105  %s2 = shl i32 %e2, 8
106  %s3 = shl i32 %e3, 16
107  %s4 = shl i32 %e4, 24
108
109  %o1 = or i32 %e1, %s3
110  %o2 = or i32 %o1, %s2
111  %o3 = or i32 %o2, %s4
112  ret i32 %o3
113}
114
115define i32 @loadCombine_4consecutive_1342(ptr %p) {
116; CHECK-LABEL: @loadCombine_4consecutive_1342(
117; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
118; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
119; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
120; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
121; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
122; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
123; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
124; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
125; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
126; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
127; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
128; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
129; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
130; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
131; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
132; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
133; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
134; CHECK-NEXT:    ret i32 [[O3]]
135;
136  %p1 = getelementptr i8, ptr %p, i32 1
137  %p2 = getelementptr i8, ptr %p, i32 2
138  %p3 = getelementptr i8, ptr %p, i32 3
139  %l1 = load i8, ptr %p
140  %l2 = load i8, ptr %p1
141  %l3 = load i8, ptr %p2
142  %l4 = load i8, ptr %p3
143
144  %e1 = zext i8 %l1 to i32
145  %e2 = zext i8 %l2 to i32
146  %e3 = zext i8 %l3 to i32
147  %e4 = zext i8 %l4 to i32
148
149  %s2 = shl i32 %e2, 8
150  %s3 = shl i32 %e3, 16
151  %s4 = shl i32 %e4, 24
152
153  %o1 = or i32 %e1, %s3
154  %o2 = or i32 %o1, %s4
155  %o3 = or i32 %o2, %s2
156  ret i32 %o3
157}
158
159define i32 @loadCombine_4consecutive_1423(ptr %p) {
160; CHECK-LABEL: @loadCombine_4consecutive_1423(
161; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
162; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
163; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
164; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
165; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
166; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
167; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
168; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
169; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
170; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
171; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
172; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
173; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
174; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
175; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
176; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
177; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
178; CHECK-NEXT:    ret i32 [[O3]]
179;
180  %p1 = getelementptr i8, ptr %p, i32 1
181  %p2 = getelementptr i8, ptr %p, i32 2
182  %p3 = getelementptr i8, ptr %p, i32 3
183  %l1 = load i8, ptr %p
184  %l2 = load i8, ptr %p1
185  %l3 = load i8, ptr %p2
186  %l4 = load i8, ptr %p3
187
188  %e1 = zext i8 %l1 to i32
189  %e2 = zext i8 %l2 to i32
190  %e3 = zext i8 %l3 to i32
191  %e4 = zext i8 %l4 to i32
192
193  %s2 = shl i32 %e2, 8
194  %s3 = shl i32 %e3, 16
195  %s4 = shl i32 %e4, 24
196
197  %o1 = or i32 %e1, %s4
198  %o2 = or i32 %o1, %s2
199  %o3 = or i32 %o2, %s3
200  ret i32 %o3
201}
202
203define i32 @loadCombine_4consecutive_1432(ptr %p) {
204; CHECK-LABEL: @loadCombine_4consecutive_1432(
205; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
206; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
207; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
208; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
209; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
210; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
211; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
212; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
213; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
214; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
215; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
216; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
217; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
218; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
219; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
220; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
221; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
222; CHECK-NEXT:    ret i32 [[O3]]
223;
224  %p1 = getelementptr i8, ptr %p, i32 1
225  %p2 = getelementptr i8, ptr %p, i32 2
226  %p3 = getelementptr i8, ptr %p, i32 3
227  %l1 = load i8, ptr %p
228  %l2 = load i8, ptr %p1
229  %l3 = load i8, ptr %p2
230  %l4 = load i8, ptr %p3
231
232  %e1 = zext i8 %l1 to i32
233  %e2 = zext i8 %l2 to i32
234  %e3 = zext i8 %l3 to i32
235  %e4 = zext i8 %l4 to i32
236
237  %s2 = shl i32 %e2, 8
238  %s3 = shl i32 %e3, 16
239  %s4 = shl i32 %e4, 24
240
241  %o1 = or i32 %e1, %s4
242  %o2 = or i32 %o1, %s3
243  %o3 = or i32 %o2, %s2
244  ret i32 %o3
245}
246
247define i32 @loadCombine_4consecutive_2134(ptr %p) {
248; CHECK-LABEL: @loadCombine_4consecutive_2134(
249; CHECK-NEXT:    [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
250; CHECK-NEXT:    ret i32 [[L1]]
251;
252  %p1 = getelementptr i8, ptr %p, i32 1
253  %p2 = getelementptr i8, ptr %p, i32 2
254  %p3 = getelementptr i8, ptr %p, i32 3
255  %l1 = load i8, ptr %p
256  %l2 = load i8, ptr %p1
257  %l3 = load i8, ptr %p2
258  %l4 = load i8, ptr %p3
259
260  %e1 = zext i8 %l1 to i32
261  %e2 = zext i8 %l2 to i32
262  %e3 = zext i8 %l3 to i32
263  %e4 = zext i8 %l4 to i32
264
265  %s2 = shl i32 %e2, 8
266  %s3 = shl i32 %e3, 16
267  %s4 = shl i32 %e4, 24
268
269  %o1 = or i32 %s2, %e1
270  %o2 = or i32 %o1, %s3
271  %o3 = or i32 %o2, %s4
272  ret i32 %o3
273}
274
275define i32 @loadCombine_4consecutive_2143(ptr %p) {
276; CHECK-LABEL: @loadCombine_4consecutive_2143(
277; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 2
278; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
279; CHECK-NEXT:    [[L1:%.*]] = load i16, ptr [[P]], align 1
280; CHECK-NEXT:    [[TMP1:%.*]] = zext i16 [[L1]] to i32
281; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
282; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
283; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
284; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
285; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
286; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
287; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[S3]], [[TMP1]]
288; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
289; CHECK-NEXT:    ret i32 [[O3]]
290;
291  %p1 = getelementptr i8, ptr %p, i32 1
292  %p2 = getelementptr i8, ptr %p, i32 2
293  %p3 = getelementptr i8, ptr %p, i32 3
294  %l1 = load i8, ptr %p
295  %l2 = load i8, ptr %p1
296  %l3 = load i8, ptr %p2
297  %l4 = load i8, ptr %p3
298
299  %e1 = zext i8 %l1 to i32
300  %e2 = zext i8 %l2 to i32
301  %e3 = zext i8 %l3 to i32
302  %e4 = zext i8 %l4 to i32
303
304  %s2 = shl i32 %e2, 8
305  %s3 = shl i32 %e3, 16
306  %s4 = shl i32 %e4, 24
307
308  %o1 = or i32 %s2, %e1
309  %o2 = or i32 %o1, %s4
310  %o3 = or i32 %o2, %s3
311  ret i32 %o3
312}
313
314define i32 @loadCombine_4consecutive_2314(ptr %p) {
315; CHECK-LABEL: @loadCombine_4consecutive_2314(
316; CHECK-NEXT:    [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
317; CHECK-NEXT:    ret i32 [[L1]]
318;
319  %p1 = getelementptr i8, ptr %p, i32 1
320  %p2 = getelementptr i8, ptr %p, i32 2
321  %p3 = getelementptr i8, ptr %p, i32 3
322  %l1 = load i8, ptr %p
323  %l2 = load i8, ptr %p1
324  %l3 = load i8, ptr %p2
325  %l4 = load i8, ptr %p3
326
327  %e1 = zext i8 %l1 to i32
328  %e2 = zext i8 %l2 to i32
329  %e3 = zext i8 %l3 to i32
330  %e4 = zext i8 %l4 to i32
331
332  %s2 = shl i32 %e2, 8
333  %s3 = shl i32 %e3, 16
334  %s4 = shl i32 %e4, 24
335
336  %o1 = or i32 %s2, %s3
337  %o2 = or i32 %o1, %e1
338  %o3 = or i32 %o2, %s4
339  ret i32 %o3
340}
341
342define i32 @loadCombine_4consecutive_2341(ptr %p) {
343; CHECK-LABEL: @loadCombine_4consecutive_2341(
344; CHECK-NEXT:    [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
345; CHECK-NEXT:    ret i32 [[L1]]
346;
347  %p1 = getelementptr i8, ptr %p, i32 1
348  %p2 = getelementptr i8, ptr %p, i32 2
349  %p3 = getelementptr i8, ptr %p, i32 3
350  %l1 = load i8, ptr %p
351  %l2 = load i8, ptr %p1
352  %l3 = load i8, ptr %p2
353  %l4 = load i8, ptr %p3
354
355  %e1 = zext i8 %l1 to i32
356  %e2 = zext i8 %l2 to i32
357  %e3 = zext i8 %l3 to i32
358  %e4 = zext i8 %l4 to i32
359
360  %s2 = shl i32 %e2, 8
361  %s3 = shl i32 %e3, 16
362  %s4 = shl i32 %e4, 24
363
364  %o1 = or i32 %s2, %s3
365  %o2 = or i32 %o1, %s4
366  %o3 = or i32 %o2, %e1
367  ret i32 %o3
368}
369
370define i32 @loadCombine_4consecutive_2413(ptr %p) {
371; CHECK-LABEL: @loadCombine_4consecutive_2413(
372; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
373; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
374; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
375; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
376; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
377; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
378; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
379; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
380; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
381; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
382; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
383; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
384; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
385; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
386; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
387; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
388; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
389; CHECK-NEXT:    ret i32 [[O3]]
390;
391  %p1 = getelementptr i8, ptr %p, i32 1
392  %p2 = getelementptr i8, ptr %p, i32 2
393  %p3 = getelementptr i8, ptr %p, i32 3
394  %l1 = load i8, ptr %p
395  %l2 = load i8, ptr %p1
396  %l3 = load i8, ptr %p2
397  %l4 = load i8, ptr %p3
398
399  %e1 = zext i8 %l1 to i32
400  %e2 = zext i8 %l2 to i32
401  %e3 = zext i8 %l3 to i32
402  %e4 = zext i8 %l4 to i32
403
404  %s2 = shl i32 %e2, 8
405  %s3 = shl i32 %e3, 16
406  %s4 = shl i32 %e4, 24
407
408  %o1 = or i32 %s2, %s4
409  %o2 = or i32 %o1, %e1
410  %o3 = or i32 %o2, %s3
411  ret i32 %o3
412}
413
414define i32 @loadCombine_4consecutive_2431(ptr %p) {
415; CHECK-LABEL: @loadCombine_4consecutive_2431(
416; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
417; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
418; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
419; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
420; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
421; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
422; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
423; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
424; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
425; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
426; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
427; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
428; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
429; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
430; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
431; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
432; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
433; CHECK-NEXT:    ret i32 [[O3]]
434;
435  %p1 = getelementptr i8, ptr %p, i32 1
436  %p2 = getelementptr i8, ptr %p, i32 2
437  %p3 = getelementptr i8, ptr %p, i32 3
438  %l1 = load i8, ptr %p
439  %l2 = load i8, ptr %p1
440  %l3 = load i8, ptr %p2
441  %l4 = load i8, ptr %p3
442
443  %e1 = zext i8 %l1 to i32
444  %e2 = zext i8 %l2 to i32
445  %e3 = zext i8 %l3 to i32
446  %e4 = zext i8 %l4 to i32
447
448  %s2 = shl i32 %e2, 8
449  %s3 = shl i32 %e3, 16
450  %s4 = shl i32 %e4, 24
451
452  %o1 = or i32 %s2, %s4
453  %o2 = or i32 %o1, %s3
454  %o3 = or i32 %o2, %e1
455  ret i32 %o3
456}
457
458define i32 @loadCombine_4consecutive_3124(ptr %p) {
459; CHECK-LABEL: @loadCombine_4consecutive_3124(
460; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
461; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
462; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
463; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
464; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
465; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
466; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
467; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
468; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
469; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
470; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
471; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
472; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
473; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
474; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
475; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
476; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
477; CHECK-NEXT:    ret i32 [[O3]]
478;
479  %p1 = getelementptr i8, ptr %p, i32 1
480  %p2 = getelementptr i8, ptr %p, i32 2
481  %p3 = getelementptr i8, ptr %p, i32 3
482  %l1 = load i8, ptr %p
483  %l2 = load i8, ptr %p1
484  %l3 = load i8, ptr %p2
485  %l4 = load i8, ptr %p3
486
487  %e1 = zext i8 %l1 to i32
488  %e2 = zext i8 %l2 to i32
489  %e3 = zext i8 %l3 to i32
490  %e4 = zext i8 %l4 to i32
491
492  %s2 = shl i32 %e2, 8
493  %s3 = shl i32 %e3, 16
494  %s4 = shl i32 %e4, 24
495
496  %o1 = or i32 %s3, %e1
497  %o2 = or i32 %o1, %s2
498  %o3 = or i32 %o2, %s4
499  ret i32 %o3
500}
501
502define i32 @loadCombine_4consecutive_3142(ptr %p) {
503; CHECK-LABEL: @loadCombine_4consecutive_3142(
504; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
505; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
506; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
507; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
508; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
509; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
510; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
511; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
512; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
513; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
514; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
515; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
516; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
517; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
518; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
519; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
520; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
521; CHECK-NEXT:    ret i32 [[O3]]
522;
523  %p1 = getelementptr i8, ptr %p, i32 1
524  %p2 = getelementptr i8, ptr %p, i32 2
525  %p3 = getelementptr i8, ptr %p, i32 3
526  %l1 = load i8, ptr %p
527  %l2 = load i8, ptr %p1
528  %l3 = load i8, ptr %p2
529  %l4 = load i8, ptr %p3
530
531  %e1 = zext i8 %l1 to i32
532  %e2 = zext i8 %l2 to i32
533  %e3 = zext i8 %l3 to i32
534  %e4 = zext i8 %l4 to i32
535
536  %s2 = shl i32 %e2, 8
537  %s3 = shl i32 %e3, 16
538  %s4 = shl i32 %e4, 24
539
540  %o1 = or i32 %s3, %e1
541  %o2 = or i32 %o1, %s4
542  %o3 = or i32 %o2, %s2
543  ret i32 %o3
544}
545
546define i32 @loadCombine_4consecutive_3214(ptr %p) {
547; CHECK-LABEL: @loadCombine_4consecutive_3214(
548; CHECK-NEXT:    [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
549; CHECK-NEXT:    ret i32 [[L1]]
550;
551  %p1 = getelementptr i8, ptr %p, i32 1
552  %p2 = getelementptr i8, ptr %p, i32 2
553  %p3 = getelementptr i8, ptr %p, i32 3
554  %l1 = load i8, ptr %p
555  %l2 = load i8, ptr %p1
556  %l3 = load i8, ptr %p2
557  %l4 = load i8, ptr %p3
558
559  %e1 = zext i8 %l1 to i32
560  %e2 = zext i8 %l2 to i32
561  %e3 = zext i8 %l3 to i32
562  %e4 = zext i8 %l4 to i32
563
564  %s2 = shl i32 %e2, 8
565  %s3 = shl i32 %e3, 16
566  %s4 = shl i32 %e4, 24
567
568  %o1 = or i32 %s3, %s2
569  %o2 = or i32 %o1, %e1
570  %o3 = or i32 %o2, %s4
571  ret i32 %o3
572}
573
574define i32 @loadCombine_4consecutive_3241(ptr %p) {
575; CHECK-LABEL: @loadCombine_4consecutive_3241(
576; CHECK-NEXT:    [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
577; CHECK-NEXT:    ret i32 [[L1]]
578;
579  %p1 = getelementptr i8, ptr %p, i32 1
580  %p2 = getelementptr i8, ptr %p, i32 2
581  %p3 = getelementptr i8, ptr %p, i32 3
582  %l1 = load i8, ptr %p
583  %l2 = load i8, ptr %p1
584  %l3 = load i8, ptr %p2
585  %l4 = load i8, ptr %p3
586
587  %e1 = zext i8 %l1 to i32
588  %e2 = zext i8 %l2 to i32
589  %e3 = zext i8 %l3 to i32
590  %e4 = zext i8 %l4 to i32
591
592  %s2 = shl i32 %e2, 8
593  %s3 = shl i32 %e3, 16
594  %s4 = shl i32 %e4, 24
595
596  %o1 = or i32 %s3, %s2
597  %o2 = or i32 %o1, %s4
598  %o3 = or i32 %o2, %e1
599  ret i32 %o3
600}
601
602define i32 @loadCombine_4consecutive_3412(ptr %p) {
603; CHECK-LABEL: @loadCombine_4consecutive_3412(
604; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
605; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
606; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
607; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
608; CHECK-NEXT:    [[L3:%.*]] = load i16, ptr [[P2]], align 1
609; CHECK-NEXT:    [[TMP1:%.*]] = zext i16 [[L3]] to i32
610; CHECK-NEXT:    [[TMP2:%.*]] = shl nuw i32 [[TMP1]], 16
611; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
612; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
613; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
614; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[S2]], [[E1]]
615; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[TMP2]]
616; CHECK-NEXT:    ret i32 [[O3]]
617;
618  %p1 = getelementptr i8, ptr %p, i32 1
619  %p2 = getelementptr i8, ptr %p, i32 2
620  %p3 = getelementptr i8, ptr %p, i32 3
621  %l1 = load i8, ptr %p
622  %l2 = load i8, ptr %p1
623  %l3 = load i8, ptr %p2
624  %l4 = load i8, ptr %p3
625
626  %e1 = zext i8 %l1 to i32
627  %e2 = zext i8 %l2 to i32
628  %e3 = zext i8 %l3 to i32
629  %e4 = zext i8 %l4 to i32
630
631  %s2 = shl i32 %e2, 8
632  %s3 = shl i32 %e3, 16
633  %s4 = shl i32 %e4, 24
634
635  %o1 = or i32 %s3, %s4
636  %o2 = or i32 %o1, %e1
637  %o3 = or i32 %o2, %s2
638  ret i32 %o3
639}
640
641define i32 @loadCombine_4consecutive_3421(ptr %p) {
642; CHECK-LABEL: @loadCombine_4consecutive_3421(
643; CHECK-NEXT:    [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
644; CHECK-NEXT:    ret i32 [[L1]]
645;
646  %p1 = getelementptr i8, ptr %p, i32 1
647  %p2 = getelementptr i8, ptr %p, i32 2
648  %p3 = getelementptr i8, ptr %p, i32 3
649  %l1 = load i8, ptr %p
650  %l2 = load i8, ptr %p1
651  %l3 = load i8, ptr %p2
652  %l4 = load i8, ptr %p3
653
654  %e1 = zext i8 %l1 to i32
655  %e2 = zext i8 %l2 to i32
656  %e3 = zext i8 %l3 to i32
657  %e4 = zext i8 %l4 to i32
658
659  %s2 = shl i32 %e2, 8
660  %s3 = shl i32 %e3, 16
661  %s4 = shl i32 %e4, 24
662
663  %o1 = or i32 %s3, %s4
664  %o2 = or i32 %o1, %s2
665  %o3 = or i32 %o2, %e1
666  ret i32 %o3
667}
668
669define i32 @loadCombine_4consecutive_4123(ptr %p) {
670; CHECK-LABEL: @loadCombine_4consecutive_4123(
671; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
672; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
673; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
674; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
675; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
676; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
677; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
678; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
679; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
680; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
681; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
682; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
683; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
684; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
685; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
686; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
687; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
688; CHECK-NEXT:    ret i32 [[O3]]
689;
690  %p1 = getelementptr i8, ptr %p, i32 1
691  %p2 = getelementptr i8, ptr %p, i32 2
692  %p3 = getelementptr i8, ptr %p, i32 3
693  %l1 = load i8, ptr %p
694  %l2 = load i8, ptr %p1
695  %l3 = load i8, ptr %p2
696  %l4 = load i8, ptr %p3
697
698  %e1 = zext i8 %l1 to i32
699  %e2 = zext i8 %l2 to i32
700  %e3 = zext i8 %l3 to i32
701  %e4 = zext i8 %l4 to i32
702
703  %s2 = shl i32 %e2, 8
704  %s3 = shl i32 %e3, 16
705  %s4 = shl i32 %e4, 24
706
707  %o1 = or i32 %s4, %e1
708  %o2 = or i32 %o1, %s2
709  %o3 = or i32 %o2, %s3
710  ret i32 %o3
711}
712
713define i32 @loadCombine_4consecutive_4132(ptr %p) {
714; CHECK-LABEL: @loadCombine_4consecutive_4132(
715; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
716; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
717; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
718; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
719; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
720; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
721; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
722; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
723; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
724; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
725; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
726; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
727; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
728; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
729; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
730; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
731; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
732; CHECK-NEXT:    ret i32 [[O3]]
733;
734  %p1 = getelementptr i8, ptr %p, i32 1
735  %p2 = getelementptr i8, ptr %p, i32 2
736  %p3 = getelementptr i8, ptr %p, i32 3
737  %l1 = load i8, ptr %p
738  %l2 = load i8, ptr %p1
739  %l3 = load i8, ptr %p2
740  %l4 = load i8, ptr %p3
741
742  %e1 = zext i8 %l1 to i32
743  %e2 = zext i8 %l2 to i32
744  %e3 = zext i8 %l3 to i32
745  %e4 = zext i8 %l4 to i32
746
747  %s2 = shl i32 %e2, 8
748  %s3 = shl i32 %e3, 16
749  %s4 = shl i32 %e4, 24
750
751  %o1 = or i32 %s4, %e1
752  %o2 = or i32 %o1, %s3
753  %o3 = or i32 %o2, %s2
754  ret i32 %o3
755}
756
757define i32 @loadCombine_4consecutive_4213(ptr %p) {
758; CHECK-LABEL: @loadCombine_4consecutive_4213(
759; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
760; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
761; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
762; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
763; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
764; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
765; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
766; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
767; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
768; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
769; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
770; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
771; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
772; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
773; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
774; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
775; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
776; CHECK-NEXT:    ret i32 [[O3]]
777;
778  %p1 = getelementptr i8, ptr %p, i32 1
779  %p2 = getelementptr i8, ptr %p, i32 2
780  %p3 = getelementptr i8, ptr %p, i32 3
781  %l1 = load i8, ptr %p
782  %l2 = load i8, ptr %p1
783  %l3 = load i8, ptr %p2
784  %l4 = load i8, ptr %p3
785
786  %e1 = zext i8 %l1 to i32
787  %e2 = zext i8 %l2 to i32
788  %e3 = zext i8 %l3 to i32
789  %e4 = zext i8 %l4 to i32
790
791  %s2 = shl i32 %e2, 8
792  %s3 = shl i32 %e3, 16
793  %s4 = shl i32 %e4, 24
794
795  %o1 = or i32 %s4, %s2
796  %o2 = or i32 %o1, %e1
797  %o3 = or i32 %o2, %s3
798  ret i32 %o3
799}
800
801define i32 @loadCombine_4consecutive_4231(ptr %p) {
802; CHECK-LABEL: @loadCombine_4consecutive_4231(
803; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
804; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
805; CHECK-NEXT:    [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 3
806; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
807; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
808; CHECK-NEXT:    [[L3:%.*]] = load i8, ptr [[P2]], align 1
809; CHECK-NEXT:    [[L4:%.*]] = load i8, ptr [[P3]], align 1
810; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
811; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
812; CHECK-NEXT:    [[E3:%.*]] = zext i8 [[L3]] to i32
813; CHECK-NEXT:    [[E4:%.*]] = zext i8 [[L4]] to i32
814; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
815; CHECK-NEXT:    [[S3:%.*]] = shl nuw nsw i32 [[E3]], 16
816; CHECK-NEXT:    [[S4:%.*]] = shl nuw i32 [[E4]], 24
817; CHECK-NEXT:    [[O1:%.*]] = or disjoint i32 [[S2]], [[E1]]
818; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[O1]], [[S3]]
819; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[S4]]
820; CHECK-NEXT:    ret i32 [[O3]]
821;
822  %p1 = getelementptr i8, ptr %p, i32 1
823  %p2 = getelementptr i8, ptr %p, i32 2
824  %p3 = getelementptr i8, ptr %p, i32 3
825  %l1 = load i8, ptr %p
826  %l2 = load i8, ptr %p1
827  %l3 = load i8, ptr %p2
828  %l4 = load i8, ptr %p3
829
830  %e1 = zext i8 %l1 to i32
831  %e2 = zext i8 %l2 to i32
832  %e3 = zext i8 %l3 to i32
833  %e4 = zext i8 %l4 to i32
834
835  %s2 = shl i32 %e2, 8
836  %s3 = shl i32 %e3, 16
837  %s4 = shl i32 %e4, 24
838
839  %o1 = or i32 %s4, %s2
840  %o2 = or i32 %o1, %s3
841  %o3 = or i32 %o2, %e1
842  ret i32 %o3
843}
844
845define i32 @loadCombine_4consecutive_4312(ptr %p) {
846; CHECK-LABEL: @loadCombine_4consecutive_4312(
847; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
848; CHECK-NEXT:    [[P2:%.*]] = getelementptr i8, ptr [[P]], i64 2
849; CHECK-NEXT:    [[L1:%.*]] = load i8, ptr [[P]], align 1
850; CHECK-NEXT:    [[L2:%.*]] = load i8, ptr [[P1]], align 1
851; CHECK-NEXT:    [[L3:%.*]] = load i16, ptr [[P2]], align 1
852; CHECK-NEXT:    [[TMP1:%.*]] = zext i16 [[L3]] to i32
853; CHECK-NEXT:    [[TMP2:%.*]] = shl nuw i32 [[TMP1]], 16
854; CHECK-NEXT:    [[E1:%.*]] = zext i8 [[L1]] to i32
855; CHECK-NEXT:    [[E2:%.*]] = zext i8 [[L2]] to i32
856; CHECK-NEXT:    [[S2:%.*]] = shl nuw nsw i32 [[E2]], 8
857; CHECK-NEXT:    [[O2:%.*]] = or disjoint i32 [[S2]], [[E1]]
858; CHECK-NEXT:    [[O3:%.*]] = or disjoint i32 [[O2]], [[TMP2]]
859; CHECK-NEXT:    ret i32 [[O3]]
860;
861  %p1 = getelementptr i8, ptr %p, i32 1
862  %p2 = getelementptr i8, ptr %p, i32 2
863  %p3 = getelementptr i8, ptr %p, i32 3
864  %l1 = load i8, ptr %p
865  %l2 = load i8, ptr %p1
866  %l3 = load i8, ptr %p2
867  %l4 = load i8, ptr %p3
868
869  %e1 = zext i8 %l1 to i32
870  %e2 = zext i8 %l2 to i32
871  %e3 = zext i8 %l3 to i32
872  %e4 = zext i8 %l4 to i32
873
874  %s2 = shl i32 %e2, 8
875  %s3 = shl i32 %e3, 16
876  %s4 = shl i32 %e4, 24
877
878  %o1 = or i32 %s4, %s3
879  %o2 = or i32 %o1, %e1
880  %o3 = or i32 %o2, %s2
881  ret i32 %o3
882}
883
884define i32 @loadCombine_4consecutive_4321(ptr %p) {
885; CHECK-LABEL: @loadCombine_4consecutive_4321(
886; CHECK-NEXT:    [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
887; CHECK-NEXT:    ret i32 [[L1]]
888;
889  %p1 = getelementptr i8, ptr %p, i32 1
890  %p2 = getelementptr i8, ptr %p, i32 2
891  %p3 = getelementptr i8, ptr %p, i32 3
892  %l1 = load i8, ptr %p
893  %l2 = load i8, ptr %p1
894  %l3 = load i8, ptr %p2
895  %l4 = load i8, ptr %p3
896
897  %e1 = zext i8 %l1 to i32
898  %e2 = zext i8 %l2 to i32
899  %e3 = zext i8 %l3 to i32
900  %e4 = zext i8 %l4 to i32
901
902  %s2 = shl i32 %e2, 8
903  %s3 = shl i32 %e3, 16
904  %s4 = shl i32 %e4, 24
905
906  %o1 = or i32 %s4, %s3
907  %o2 = or i32 %o1, %s2
908  %o3 = or i32 %o2, %e1
909  ret i32 %o3
910}
911