xref: /llvm-project/llvm/test/Transforms/PhaseOrdering/X86/SROA-after-final-loop-unrolling.ll (revision 8adfa29706e5407b62a4726e2172894e0dfdc1e8)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -O3 -S                   | FileCheck %s
3; RUN: opt < %s -passes="default<O3>" -S | FileCheck %s
4
5target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
6target triple = "x86_64-pc-linux-gnu"
7
8%t0 = type { ptr, ptr }
9%t1 = type { [16 x i32] }
10%t2 = type { %t3, ptr }
11%t3 = type { i8 }
12
13define void @wibble(ptr %arg) personality ptr null {
14; CHECK-LABEL: @wibble(
15; CHECK-NEXT:  bb:
16; CHECK-NEXT:    [[I10_3_I_PRE:%.*]] = load i8, ptr [[ARG:%.*]], align 1
17; CHECK-NEXT:    [[TMP0:%.*]] = or i8 [[I10_3_I_PRE]], 1
18; CHECK-NEXT:    [[I1_SROA_0_0_VEC_EXTRACT:%.*]] = zext i8 [[TMP0]] to i32
19; CHECK-NEXT:    [[I4_I_I:%.*]] = add nuw nsw i32 [[I1_SROA_0_0_VEC_EXTRACT]], 1
20; CHECK-NEXT:    store i32 [[I4_I_I]], ptr [[ARG]], align 4
21; CHECK-NEXT:    ret void
22;
23bb:
24  %i = alloca [0 x [0 x [0 x [0 x [0 x [0 x %t0]]]]]], i32 0, align 8
25  %i1 = alloca %t1, align 4
26  store ptr %arg, ptr %i, align 8
27  %i2 = getelementptr %t0, ptr %i, i64 0, i32 1
28  store ptr %i1, ptr %i2, align 8
29  br label %bb3
30
31bb3:                                              ; preds = %bb7, %bb
32  %i4 = phi i32 [ 0, %bb ], [ %i8, %bb7 ]
33  %i5 = icmp ult i32 %i4, 16
34  br i1 %i5, label %bb7, label %bb6
35
36bb6:                                              ; preds = %bb3
37  call void @baz(ptr %i, ptr %arg)
38  ret void
39
40bb7:                                              ; preds = %bb3
41  call void @foo(ptr %i, i32 %i4)
42  %i8 = add i32 %i4, 1
43  br label %bb3
44}
45
46define linkonce_odr ptr @hoge(ptr %arg, i64 %arg1) {
47bb:
48  %i = call ptr @ham(ptr %arg, i64 %arg1)
49  ret ptr %i
50}
51
52define linkonce_odr void @foo(ptr %arg, i32 %arg1) {
53bb:
54  %i = load ptr, ptr %arg, align 8
55  br label %bb2
56
57bb2:                                              ; preds = %bb6, %bb
58  %i3 = phi i32 [ 3, %bb ], [ %i17, %bb6 ]
59  %i4 = icmp sgt i32 %i3, -1
60  br i1 %i4, label %bb6, label %bb5
61
62bb5:                                              ; preds = %bb2
63  ret void
64
65bb6:                                              ; preds = %bb2
66  %i7 = add i32 %i3, %arg1
67  %i8 = sext i32 %i7 to i64
68  %i9 = call ptr @hoge(ptr %i, i64 %i8)
69  %i10 = load i8, ptr %i9, align 1
70  %i11 = getelementptr %t0, ptr %arg, i64 0, i32 1
71  %i12 = load ptr, ptr %i11, align 8
72  %i13 = sext i32 %arg1 to i64
73  %i14 = call ptr @foo.1(ptr %i12, i64 %i13)
74  %i15 = or i8 %i10, 1
75  %i16 = zext i8 %i15 to i32
76  store i32 %i16, ptr %i14, align 4
77  %i17 = add i32 %i3, -1
78  br label %bb2
79}
80
81define linkonce_odr void @baz(ptr %arg, ptr %arg1) {
82bb:
83  call void @pluto(ptr %arg, ptr %arg1)
84  ret void
85}
86
87define linkonce_odr ptr @foo.1(ptr %arg, i64 %arg1) {
88bb:
89  %i = call ptr @baz.2(ptr %arg, i64 %arg1)
90  ret ptr %i
91}
92
93define linkonce_odr ptr @baz.2(ptr %arg, i64 %arg1) {
94bb:
95  %i = getelementptr [16 x i32], ptr %arg, i64 0, i64 %arg1
96  ret ptr %i
97}
98
99define linkonce_odr void @pluto(ptr %arg, ptr %arg1) {
100bb:
101  %i = getelementptr %t2, ptr %arg, i64 0, i32 1
102  %i2 = load ptr, ptr %i, align 8
103  %i3 = load i32, ptr %i2, align 4
104  %i4 = add i32 %i3, 1
105  store i32 %i4, ptr %arg1, align 4
106  ret void
107}
108
109define linkonce_odr ptr @ham(ptr %arg, i64 %arg1) {
110bb:
111  %i = getelementptr [64 x i8], ptr %arg, i64 0, i64 %arg1
112  ret ptr %i
113}
114