1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-globals 2; RUN: opt --mtriple=amdgcn-amd-amdhsa --data-layout=A5 -S -passes=openmp-opt < %s | FileCheck %s --check-prefixes=AMDGPU 3 4target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9" 5target triple = "amdgcn-amd-amdhsa" 6 7%struct.KernelEnvironmentTy = type { %struct.ConfigurationEnvironmentTy.8, ptr, ptr } 8%struct.ConfigurationEnvironmentTy.8 = type { i8, i8, i8, i32, i32, i32, i32, i32, i32 } 9 10@IsSPMDMode = internal addrspace(3) global i32 undef 11@__omp_offloading_10302_b20a40e_main_l4_kernel_environment = addrspace(1) constant %struct.KernelEnvironmentTy { %struct.ConfigurationEnvironmentTy.8 { i8 1, i8 0, i8 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 }, ptr addrspacecast (ptr addrspace(1) null to ptr), ptr addrspacecast (ptr addrspace(1) null to ptr) } 12 13;. 14; AMDGPU: @IsSPMDMode = internal addrspace(3) global i32 undef 15; AMDGPU: @__omp_offloading_10302_b20a40e_main_l4_kernel_environment = addrspace(1) constant %struct.KernelEnvironmentTy { %struct.ConfigurationEnvironmentTy.8 { i8 0, i8 0, i8 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 }, ptr addrspacecast (ptr addrspace(1) null to ptr), ptr addrspacecast (ptr addrspace(1) null to ptr) } 16;. 17define i32 @fputs() { 18; AMDGPU-LABEL: define {{[^@]+}}@fputs 19; AMDGPU-SAME: () #[[ATTR0:[0-9]+]] { 20; AMDGPU-NEXT: fence acquire 21; AMDGPU-NEXT: ret i32 0 22; 23 fence acquire 24 ret i32 0 25} 26 27define internal i32 @__kmpc_target_init(ptr %0, ptr %dyn) { 28; AMDGPU-LABEL: define {{[^@]+}}@__kmpc_target_init 29; AMDGPU-SAME: (ptr [[TMP0:%.*]], ptr [[DYN:%.*]]) #[[ATTR1:[0-9]+]] { 30; AMDGPU-NEXT: [[TMP2:%.*]] = addrspacecast ptr getelementptr (i8, ptr addrspacecast (ptr addrspace(1) @__omp_offloading_10302_b20a40e_main_l4_kernel_environment to ptr), i64 2) to ptr addrspace(1) 31; AMDGPU-NEXT: [[TMP3:%.*]] = load i8, ptr addrspace(1) [[TMP2]], align 2 32; AMDGPU-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 2 33; AMDGPU-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0 34; AMDGPU-NEXT: [[TMP6:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x() #[[ATTR3:[0-9]+]] 35; AMDGPU-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0 36; AMDGPU-NEXT: [[OR_COND:%.*]] = select i1 [[TMP5]], i1 [[TMP7]], i1 false 37; AMDGPU-NEXT: br i1 [[OR_COND]], label [[TMP8:%.*]], label [[TMP9:%.*]] 38; AMDGPU: 8: 39; AMDGPU-NEXT: store i8 0, ptr addrspace(3) null, align 2147483648 40; AMDGPU-NEXT: br label [[TMP9]] 41; AMDGPU: 9: 42; AMDGPU-NEXT: br label [[TMP11:%.*]] 43; AMDGPU: 10: 44; AMDGPU-NEXT: unreachable 45; AMDGPU: 11: 46; AMDGPU-NEXT: ret i32 0 47; 48 %2 = getelementptr %struct.ConfigurationEnvironmentTy.8, ptr %0, i64 0, i32 2 49 %3 = load i8, ptr %2, align 2 50 %4 = and i8 %3, 2 51 %5 = icmp ne i8 %4, 0 52 %6 = tail call i32 @llvm.amdgcn.workitem.id.x() 53 %7 = icmp eq i32 %6, 0 54 %or.cond = select i1 %5, i1 %7, i1 false 55 br i1 %or.cond, label %8, label %9 56 578: ; preds = %1 58 store i32 1, ptr addrspace(3) @IsSPMDMode, align 4 59 store i8 0, ptr addrspace(3) null, align 2147483648 60 br label %9 61 629: ; preds = %8, %1 63 %10 = load i32, ptr addrspace(3) @IsSPMDMode, align 4 64 %11 = icmp eq i32 %10, 0 65 br i1 %11, label %12, label %13 66 6712: ; preds = %9 68 unreachable 69 7013: ; preds = %9 71 ret i32 0 72} 73 74; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) 75declare i32 @llvm.amdgcn.workitem.id.x() #0 76 77declare void @__kmpc_target_deinit() 78 79define amdgpu_kernel void @__omp_offloading_10302_b20a40e_main_l4(ptr %dyn) { 80; AMDGPU-LABEL: define {{[^@]+}}@__omp_offloading_10302_b20a40e_main_l4 81; AMDGPU-SAME: (ptr [[DYN:%.*]]) { 82; AMDGPU-NEXT: [[TMP1:%.*]] = tail call i32 @__kmpc_target_init(ptr addrspacecast (ptr addrspace(1) @__omp_offloading_10302_b20a40e_main_l4_kernel_environment to ptr), ptr [[DYN]]) #[[ATTR4:[0-9]+]] 83; AMDGPU-NEXT: br label [[TMP2:%.*]] 84; AMDGPU: 2: 85; AMDGPU-NEXT: [[TMP3:%.*]] = call i32 @fputs() #[[ATTR0]] 86; AMDGPU-NEXT: tail call void @__kmpc_target_deinit() 87; AMDGPU-NEXT: ret void 88; 89 %1 = tail call i32 @__kmpc_target_init(ptr addrspacecast (ptr addrspace(1) @__omp_offloading_10302_b20a40e_main_l4_kernel_environment to ptr), ptr %dyn) 90 br label %2 91 922: ; preds = %0 93 %3 = call i32 @fputs() 94 tail call void @__kmpc_target_deinit() 95 ret void 96} 97 98attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } 99 100!llvm.module.flags = !{!0} 101 102!0 = !{i32 7, !"openmp", i32 51} 103 104;. 105; AMDGPU: attributes #[[ATTR0]] = { nounwind } 106; AMDGPU: attributes #[[ATTR1]] = { norecurse nosync nounwind } 107; AMDGPU: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } 108; AMDGPU: attributes #[[ATTR3]] = { nosync } 109; AMDGPU: attributes #[[ATTR4]] = { nosync nounwind } 110;. 111; AMDGPU: [[META0:![0-9]+]] = !{i32 7, !"openmp", i32 51} 112;. 113