1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt -passes=loop-versioning -S %s | FileCheck %s 3 4; Callers should not call LoopVersioning on single-iteration loops, as it 5; is very likely not profitable. 6; LoopVersioning faithfully versions single-iteration loops when the stride 7; is unknown. 8 9define double @single_iteration_unknown_stride(i32 %x, ptr %y, i1 %cond) { 10; CHECK-LABEL: define double @single_iteration_unknown_stride( 11; CHECK-SAME: i32 [[X:%.*]], ptr [[Y:%.*]], i1 [[COND:%.*]]) { 12; CHECK-NEXT: [[ENTRY:.*:]] 13; CHECK-NEXT: br i1 [[COND]], label %[[NOLOOP_EXIT:.*]], label %[[LOOP_BODY_LVER_CHECK:.*]] 14; CHECK: [[LOOP_BODY_LVER_CHECK]]: 15; CHECK-NEXT: [[SEXT7:%.*]] = sext i32 [[X]] to i64 16; CHECK-NEXT: [[GEP8:%.*]] = getelementptr i8, ptr [[Y]], i64 8 17; CHECK-NEXT: [[IDENT_CHECK:%.*]] = icmp ne i32 [[X]], 1 18; CHECK-NEXT: br i1 [[IDENT_CHECK]], label %[[LOOP_BODY_PH_LVER_ORIG:.*]], label %[[LOOP_BODY_PH:.*]] 19; CHECK: [[LOOP_BODY_PH_LVER_ORIG]]: 20; CHECK-NEXT: br label %[[LOOP_BODY_LVER_ORIG:.*]] 21; CHECK: [[LOOP_BODY_LVER_ORIG]]: 22; CHECK-NEXT: [[PHI_LVER_ORIG:%.*]] = phi i64 [ 0, %[[LOOP_BODY_PH_LVER_ORIG]] ], [ [[ADD_LVER_ORIG:%.*]], %[[LOOP_BODY_LVER_ORIG]] ] 23; CHECK-NEXT: [[MUL_LVER_ORIG:%.*]] = mul i64 [[PHI_LVER_ORIG]], [[SEXT7]] 24; CHECK-NEXT: [[GEP10_LVER_ORIG:%.*]] = getelementptr double, ptr [[GEP8]], i64 [[MUL_LVER_ORIG]] 25; CHECK-NEXT: [[LOAD11_LVER_ORIG:%.*]] = load double, ptr [[GEP10_LVER_ORIG]], align 8 26; CHECK-NEXT: store double [[LOAD11_LVER_ORIG]], ptr [[Y]], align 8 27; CHECK-NEXT: [[ADD_LVER_ORIG]] = add i64 [[PHI_LVER_ORIG]], 1 28; CHECK-NEXT: [[ICMP_LVER_ORIG:%.*]] = icmp eq i64 [[PHI_LVER_ORIG]], 0 29; CHECK-NEXT: br i1 [[ICMP_LVER_ORIG]], label %[[LOOP_EXIT_LOOPEXIT:.*]], label %[[LOOP_BODY_LVER_ORIG]] 30; CHECK: [[LOOP_BODY_PH]]: 31; CHECK-NEXT: br label %[[LOOP_BODY:.*]] 32; CHECK: [[LOOP_BODY]]: 33; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ 0, %[[LOOP_BODY_PH]] ], [ [[ADD:%.*]], %[[LOOP_BODY]] ] 34; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[PHI]], [[SEXT7]] 35; CHECK-NEXT: [[GEP10:%.*]] = getelementptr double, ptr [[GEP8]], i64 [[MUL]] 36; CHECK-NEXT: [[LOAD11:%.*]] = load double, ptr [[GEP10]], align 8 37; CHECK-NEXT: store double [[LOAD11]], ptr [[Y]], align 8 38; CHECK-NEXT: [[ADD]] = add i64 [[PHI]], 1 39; CHECK-NEXT: [[ICMP:%.*]] = icmp eq i64 [[PHI]], 0 40; CHECK-NEXT: br i1 [[ICMP]], label %[[LOOP_EXIT_LOOPEXIT1:.*]], label %[[LOOP_BODY]] 41; CHECK: [[NOLOOP_EXIT]]: 42; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X]] to i64 43; CHECK-NEXT: [[GEP:%.*]] = getelementptr double, ptr [[Y]], i64 [[SEXT]] 44; CHECK-NEXT: [[LOAD5:%.*]] = load double, ptr [[GEP]], align 8 45; CHECK-NEXT: ret double [[LOAD5]] 46; CHECK: [[LOOP_EXIT_LOOPEXIT]]: 47; CHECK-NEXT: br label %[[LOOP_EXIT:.*]] 48; CHECK: [[LOOP_EXIT_LOOPEXIT1]]: 49; CHECK-NEXT: br label %[[LOOP_EXIT]] 50; CHECK: [[LOOP_EXIT]]: 51; CHECK-NEXT: [[SEXT2:%.*]] = sext i32 [[X]] to i64 52; CHECK-NEXT: [[GEP2:%.*]] = getelementptr double, ptr [[Y]], i64 [[SEXT2]] 53; CHECK-NEXT: [[LOAD6:%.*]] = load double, ptr [[GEP2]], align 8 54; CHECK-NEXT: ret double [[LOAD6]] 55; 56entry: 57 br i1 %cond, label %noloop.exit, label %loop.ph 58 59loop.ph: ; preds = %entry 60 %sext7 = sext i32 %x to i64 61 %gep8 = getelementptr i8, ptr %y, i64 8 62 br label %loop.body 63 64loop.body: ; preds = %loop.body, %loop.ph 65 %iv = phi i64 [ 0, %loop.ph ], [ %iv.next, %loop.body ] 66 %mul = mul i64 %iv, %sext7 67 %gep10 = getelementptr double, ptr %gep8, i64 %mul 68 %load11 = load double, ptr %gep10, align 8 69 store double %load11, ptr %y, align 8 70 %iv.next = add i64 %iv, 1 71 %icmp = icmp eq i64 %iv, 0 72 br i1 %icmp, label %loop.exit, label %loop.body 73 74noloop.exit: ; preds = %entry 75 %sext = sext i32 %x to i64 76 %gep = getelementptr double, ptr %y, i64 %sext 77 %load5 = load double, ptr %gep, align 8 78 ret double %load5 79 80loop.exit: ; preds = %loop.body 81 %sext2 = sext i32 %x to i64 82 %gep2 = getelementptr double, ptr %y, i64 %sext2 83 %load6 = load double, ptr %gep2, align 8 84 ret double %load6 85} 86