xref: /llvm-project/llvm/test/Transforms/LoopVectorize/vplan-printing.ll (revision 0294dab79e24cc4fc41e2d9fc77ad02730e412bc) 
1; REQUIRES: asserts
2
3; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -enable-interleaved-mem-accesses=true -enable-masked-interleaved-mem-accesses -force-widen-divrem-via-safe-divisor=0 -disable-output %s 2>&1 | FileCheck %s
4
5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
6
7; Tests for printing VPlans.
8
9define void @print_call_and_memory(i64 %n, ptr noalias %y, ptr noalias %x) nounwind uwtable {
10; CHECK-LABEL: Checking a loop in 'print_call_and_memory'
11; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
12; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
13; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
14; CHECK-NEXT: Live-in ir<%n> = original trip-count
15; CHECK-EMPTY:
16; CHECK-NEXT: ir-bb<for.body.preheader>:
17; CHECK-NEXT: Successor(s): vector.ph
18; CHECK-EMPTY:
19; CHECK-NEXT: vector.ph:
20; CHECK-NEXT: Successor(s): vector loop
21; CHECK-EMPTY:
22; CHECK-NEXT: <x1> vector loop: {
23; CHECK-NEXT: vector.body:
24; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
25; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
26; CHECK-NEXT:   CLONE ir<%arrayidx> = getelementptr inbounds ir<%y>, vp<[[STEPS]]>
27; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%arrayidx>
28; CHECK-NEXT:   WIDEN ir<%lv> = load vp<[[VEC_PTR]]>
29; CHECK-NEXT:   WIDEN-INTRINSIC ir<%call> = call llvm.sqrt(ir<%lv>)
30; CHECK-NEXT:   CLONE ir<%arrayidx2> = getelementptr inbounds ir<%x>, vp<[[STEPS]]>
31; CHECK-NEXT:   vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%arrayidx2>
32; CHECK-NEXT:   WIDEN store vp<[[VEC_PTR2]]>, ir<%call>
33; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
34; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
35; CHECK-NEXT: No successors
36; CHECK-NEXT: }
37; CHECK-NEXT: Successor(s): middle.block
38; CHECK-EMPTY:
39; CHECK-NEXT: middle.block:
40; CHECK-NEXT:    EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]>
41; CHECK-NEXT:    EMIT branch-on-cond vp<[[CMP]]>
42; CHECK-NEXT:  Successor(s): ir-bb<for.end.loopexit>, scalar.ph
43; CHECK-EMPTY:
44; CHECK-NEXT:  scalar.ph
45; CHECK-NEXT:    EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
46; CHECK-NEXT:  Successor(s): ir-bb<for.body>
47; CHECK-EMPTY:
48; CHECK-NEXT:  ir-bb<for.body>:
49; CHECK-NEXT:    IR   %iv = phi i64 [ %iv.next, %for.body ], [ 0, %for.body.preheader ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
50; CHECK:         IR   %exitcond = icmp eq i64 %iv.next, %n
51; CHECK-NEXT:  No successors
52; CHECK-EMPTY:
53; CHECK-NEXT:  ir-bb<for.end.loopexit>
54; CHECK-NEXT:  No successors
55; CHECK-NEXT: }
56;
57entry:
58  %cmp6 = icmp sgt i64 %n, 0
59  br i1 %cmp6, label %for.body, label %for.end
60
61for.body:                                         ; preds = %entry, %for.body
62  %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
63  %arrayidx = getelementptr inbounds float, ptr %y, i64 %iv
64  %lv = load float, ptr %arrayidx, align 4
65  %call = tail call float @llvm.sqrt.f32(float %lv) nounwind readnone
66  %arrayidx2 = getelementptr inbounds float, ptr %x, i64 %iv
67  store float %call, ptr %arrayidx2, align 4
68  %iv.next = add i64 %iv, 1
69  %exitcond = icmp eq i64 %iv.next, %n
70  br i1 %exitcond, label %for.end, label %for.body
71
72for.end:                                          ; preds = %for.body, %entry
73  ret void
74}
75
76define void @print_widen_gep_and_select(i64 %n, ptr noalias %y, ptr noalias %x, ptr %z) nounwind uwtable {
77; CHECK-LABEL: Checking a loop in 'print_widen_gep_and_select'
78; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
79; CHECK-NEXT: Live-in vp<[[VF:%.]]> = VF
80; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
81; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
82; CHECK-NEXT: Live-in ir<%n> = original trip-count
83; CHECK-EMPTY:
84; CHECK-NEXT: ir-bb<for.body.preheader>:
85; CHECK-NEXT: Successor(s): vector.ph
86; CHECK-EMPTY:
87; CHECK-NEXT: vector.ph:
88; CHECK-NEXT: Successor(s): vector loop
89; CHECK-EMPTY:
90; CHECK-NEXT: <x1> vector loop: {
91; CHECK-NEXT: vector.body:
92; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
93; CHECK-NEXT:   ir<%iv> = WIDEN-INDUCTION ir<0>, ir<1>, vp<[[VF]]>
94; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
95; CHECK-NEXT:   WIDEN-GEP Inv[Var] ir<%arrayidx> = getelementptr inbounds ir<%y>, ir<%iv>
96; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%arrayidx>
97; CHECK-NEXT:   WIDEN ir<%lv> = load vp<[[VEC_PTR]]>
98; CHECK-NEXT:   WIDEN ir<%cmp> = icmp eq ir<%arrayidx>, ir<%z>
99; CHECK-NEXT:   WIDEN-SELECT ir<%sel> = select ir<%cmp>, ir<1.000000e+01>, ir<2.000000e+01>
100; CHECK-NEXT:   WIDEN ir<%add> = fadd ir<%lv>, ir<%sel>
101; CHECK-NEXT:   CLONE ir<%arrayidx2> = getelementptr inbounds ir<%x>, vp<[[STEPS]]>
102; CHECK-NEXT:   vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%arrayidx2>
103; CHECK-NEXT:   WIDEN store vp<[[VEC_PTR2]]>, ir<%add>
104; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
105; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
106; CHECK-NEXT: No successors
107; CHECK-NEXT: }
108; CHECK-NEXT: Successor(s): middle.block
109; CHECK-EMPTY:
110; CHECK-NEXT: middle.block:
111; CHECK-NEXT:    EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]>
112; CHECK-NEXT:    EMIT branch-on-cond vp<[[CMP]]>
113; CHECK-NEXT:  Successor(s): ir-bb<for.end.loopexit>, scalar.ph
114; CHECK-EMPTY:
115; CHECK-NEXT:  scalar.ph
116; CHECK-NEXT:    EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
117; CHECK-NEXT:  Successor(s): ir-bb<for.body>
118; CHECK-EMPTY:
119; CHECK-NEXT:  ir-bb<for.body>:
120; CHECK-NEXT:    IR   %iv = phi i64 [ %iv.next, %for.body ], [ 0, %for.body.preheader ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
121; CHECK:         IR   %exitcond = icmp eq i64 %iv.next, %n
122; CHECK-NEXT:  No successors
123; CHECK-EMPTY:
124; CHECK-NEXT:  ir-bb<for.end.loopexit>
125; CHECK-NEXT:  No successors
126; CHECK-NEXT: }
127;
128entry:
129  %cmp6 = icmp sgt i64 %n, 0
130  br i1 %cmp6, label %for.body, label %for.end
131
132for.body:                                         ; preds = %entry, %for.body
133  %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
134  %arrayidx = getelementptr inbounds float, ptr %y, i64 %iv
135  %lv = load float, ptr %arrayidx, align 4
136  %cmp = icmp eq ptr %arrayidx, %z
137  %sel = select i1 %cmp, float 10.0, float 20.0
138  %add = fadd float %lv, %sel
139  %arrayidx2 = getelementptr inbounds float, ptr %x, i64 %iv
140  store float %add, ptr %arrayidx2, align 4
141  %iv.next = add i64 %iv, 1
142  %exitcond = icmp eq i64 %iv.next, %n
143  br i1 %exitcond, label %for.end, label %for.body
144
145for.end:                                          ; preds = %for.body, %entry
146  ret void
147}
148
149define float @print_reduction(i64 %n, ptr noalias %y) {
150; CHECK-LABEL: Checking a loop in 'print_reduction'
151; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
152; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
153; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
154; CHECK-NEXT: Live-in ir<%n> = original trip-count
155; CHECK-EMPTY:
156; CHECK-NEXT: ir-bb<entry>:
157; CHECK-NEXT: Successor(s): vector.ph
158; CHECK-EMPTY:
159; CHECK-NEXT: vector.ph:
160; CHECK-NEXT: Successor(s): vector loop
161; CHECK-EMPTY:
162; CHECK-NEXT: <x1> vector loop: {
163; CHECK-NEXT: vector.body:
164; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
165; CHECK-NEXT:   WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next>
166; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
167; CHECK-NEXT:   CLONE ir<%arrayidx> = getelementptr inbounds ir<%y>, vp<[[STEPS]]>
168; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%arrayidx>
169; CHECK-NEXT:   WIDEN ir<%lv> = load vp<[[VEC_PTR]]>
170; CHECK-NEXT:   REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>)
171; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
172; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
173; CHECK-NEXT: No successors
174; CHECK-NEXT: }
175; CHECK-NEXT: Successor(s): middle.block
176; CHECK-EMPTY:
177; CHECK-NEXT: middle.block:
178; CHECK-NEXT:   EMIT vp<[[RED_RES:%.+]]> = compute-reduction-result ir<%red>, ir<%red.next>
179; CHECK-NEXT:   EMIT vp<[[RED_EX:%.+]]> = extract-from-end vp<[[RED_RES]]>, ir<1>
180; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]>
181; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
182; CHECK-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
183; CHECK-EMPTY:
184; CHECK-NEXT: scalar.ph
185; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
186; CHECK-NEXT:   EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RED_RES]]>, ir<0.000000e+00>
187; CHECK-NEXT:  Successor(s): ir-bb<for.body>
188; CHECK-EMPTY:
189; CHECK-NEXT:  ir-bb<for.body>:
190; CHECK-NEXT:    IR   %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
191; CHECK:         IR   %exitcond = icmp eq i64 %iv.next, %n
192; CHECK-NEXT: No successors
193; CHECK-EMPTY:
194; CHECK-NEXT: ir-bb<for.end>
195; CHECK-NEXT:  IR %red.next.lcssa = phi float [ %red.next, %for.body ] (extra operand: vp<[[RED_EX]]> from middle.block)
196; CHECK-NEXT: No successors
197; CHECK-NEXT: }
198;
199entry:
200  br label %for.body
201
202for.body:                                         ; preds = %entry, %for.body
203  %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
204  %red = phi float [ %red.next, %for.body ], [ 0.0, %entry ]
205  %arrayidx = getelementptr inbounds float, ptr %y, i64 %iv
206  %lv = load float, ptr %arrayidx, align 4
207  %red.next = fadd fast float %lv, %red
208  %iv.next = add i64 %iv, 1
209  %exitcond = icmp eq i64 %iv.next, %n
210  br i1 %exitcond, label %for.end, label %for.body
211
212for.end:                                          ; preds = %for.body, %entry
213  ret float %red.next
214}
215
216define void @print_reduction_with_invariant_store(i64 %n, ptr noalias %y, ptr noalias %dst) {
217; CHECK-LABEL: Checking a loop in 'print_reduction_with_invariant_store'
218; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
219; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
220; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
221; CHECK-NEXT: Live-in ir<%n> = original trip-count
222; CHECK-EMPTY:
223; CHECK-NEXT: ir-bb<entry>:
224; CHECK-NEXT: Successor(s): vector.ph
225; CHECK-EMPTY:
226; CHECK-NEXT: vector.ph:
227; CHECK-NEXT: Successor(s): vector loop
228; CHECK-EMPTY:
229; CHECK-NEXT: <x1> vector loop: {
230; CHECK-NEXT: vector.body:
231; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
232; CHECK-NEXT:   WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next>
233; CHECK-NEXT:   vp<[[IV:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
234; CHECK-NEXT:   CLONE ir<%arrayidx> = getelementptr inbounds ir<%y>, vp<[[IV]]>
235; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%arrayidx>
236; CHECK-NEXT:   WIDEN ir<%lv> = load vp<[[VEC_PTR]]>
237; CHECK-NEXT:   REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>) (with final reduction value stored in invariant address sank outside of loop)
238; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
239; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
240; CHECK-NEXT: No successors
241; CHECK-NEXT: }
242; CHECK-NEXT: Successor(s): middle.block
243; CHECK-EMPTY:
244; CHECK-NEXT: middle.block:
245; CHECK-NEXT:   EMIT vp<[[RED_RES:.+]]> = compute-reduction-result ir<%red>, ir<%red.next>
246; CHECK-NEXT:   CLONE store vp<[[RED_RES]]>, ir<%dst>
247; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]>
248; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
249; CHECK-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
250; CHECK-EMPTY:
251; CHECK-NEXT: scalar.ph
252; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
253; CHECK-NEXT:   EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RED_RES]]>, ir<0.000000e+00>
254; CHECK-NEXT:  Successor(s): ir-bb<for.body>
255; CHECK-EMPTY:
256; CHECK-NEXT:  ir-bb<for.body>:
257; CHECK-NEXT:    IR   %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
258; CHECK-NEXT:    IR   %red = phi float [ %red.next, %for.body ], [ 0.000000e+00, %entry ]
259; CHECK:         IR   %exitcond = icmp eq i64 %iv.next, %n
260; CHECK-NEXT: No successors
261; CHECK-EMPTY:
262; CHECK-NEXT: ir-bb<for.end>
263; CHECK-NEXT: No successors
264; CHECK-NEXT: }
265;
266entry:
267  br label %for.body
268
269for.body:                                         ; preds = %entry, %for.body
270  %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
271  %red = phi float [ %red.next, %for.body ], [ 0.0, %entry ]
272  %arrayidx = getelementptr inbounds float, ptr %y, i64 %iv
273  %lv = load float, ptr %arrayidx, align 4
274  %red.next = fadd fast float %lv, %red
275  store float %red.next, ptr %dst, align 4
276  %iv.next = add i64 %iv, 1
277  %exitcond = icmp eq i64 %iv.next, %n
278  br i1 %exitcond, label %for.end, label %for.body
279
280for.end:                                          ; preds = %for.body, %entry
281  ret void
282}
283
284define void @print_replicate_predicated_phi(i64 %n, ptr %x) {
285; CHECK-LABEL: Checking a loop in 'print_replicate_predicated_phi'
286; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
287; CHECK-NEXT: Live-in vp<[[VF:%.]]> = VF
288; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
289; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
290; CHECK-NEXT: vp<[[TC:%.+]]> = original trip-count
291; CHECK-EMPTY:
292; CHECK-NEXT: ir-bb<entry>:
293; CHECK-NEXT:  EMIT vp<[[TC]]> = EXPAND SCEV (1 smax %n)
294; CHECK-NEXT: Successor(s): vector.ph
295; CHECK-EMPTY:
296; CHECK-NEXT: vector.ph:
297; CHECK-NEXT: Successor(s): vector loop
298; CHECK-EMPTY:
299; CHECK-NEXT: <x1> vector loop: {
300; CHECK-NEXT: vector.body:
301; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
302; CHECK-NEXT:   ir<%i> = WIDEN-INDUCTION ir<0>, ir<1>, vp<[[VF]]>
303; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
304; CHECK-NEXT:   WIDEN ir<%cmp> = icmp ult ir<%i>, ir<5>
305; CHECK-NEXT: Successor(s): pred.udiv
306; CHECK-EMPTY:
307; CHECK-NEXT: <xVFxUF> pred.udiv: {
308; CHECK-NEXT:   pred.udiv.entry:
309; CHECK-NEXT:     BRANCH-ON-MASK ir<%cmp>
310; CHECK-NEXT:   Successor(s): pred.udiv.if, pred.udiv.continue
311; CHECK-EMPTY:
312; CHECK-NEXT:   pred.udiv.if:
313; CHECK-NEXT:     REPLICATE ir<%tmp4> = udiv ir<%n>, vp<[[STEPS]]> (S->V)
314; CHECK-NEXT:   Successor(s): pred.udiv.continue
315; CHECK-EMPTY:
316; CHECK-NEXT:   pred.udiv.continue:
317; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%tmp4>
318; CHECK-NEXT:   No successors
319; CHECK-NEXT: }
320; CHECK-NEXT: Successor(s): if.then.0
321; CHECK-EMPTY:
322; CHECK-NEXT: if.then.0:
323; CHECK-NEXT:   BLEND ir<%d> = ir<0> vp<[[PRED]]>/ir<%cmp>
324; CHECK-NEXT:   CLONE ir<%idx> = getelementptr ir<%x>, vp<[[STEPS]]>
325; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%idx>
326; CHECK-NEXT:   WIDEN store vp<[[VEC_PTR]]>, ir<%d>
327; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
328; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
329; CHECK-NEXT: No successors
330; CHECK-NEXT: }
331; CHECK-NEXT: Successor(s): middle.block
332; CHECK-EMPTY:
333; CHECK-NEXT: middle.block:
334; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq vp<[[TC]]>, vp<[[VTC]]>
335; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
336; CHECK-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
337; CHECK-EMPTY:
338; CHECK-NEXT: scalar.ph
339; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
340; CHECK-NEXT:  Successor(s): ir-bb<for.body>
341; CHECK-EMPTY:
342; CHECK-NEXT:  ir-bb<for.body>:
343; CHECK-NEXT:    IR   %i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
344; CHECK-NEXT:    IR   %cmp = icmp ult i64 %i, 5
345; CHECK-NEXT: No successors
346; CHECK-EMPTY:
347; CHECK-NEXT: ir-bb<for.end>
348; CHECK-NEXT: No successors
349; CHECK-NEXT: }
350;
351entry:
352  br label %for.body
353
354for.body:                                         ; preds = %for.inc, %entry
355  %i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ]
356  %cmp = icmp ult i64 %i, 5
357  br i1 %cmp, label %if.then, label %for.inc
358
359if.then:                                          ; preds = %for.body
360  %tmp4 = udiv i64 %n, %i
361  br label %for.inc
362
363for.inc:                                          ; preds = %if.then, %for.body
364  %d = phi i64 [ 0, %for.body ], [ %tmp4, %if.then ]
365  %idx = getelementptr i64, ptr %x, i64 %i
366  store i64 %d, ptr %idx
367  %i.next = add nuw nsw i64 %i, 1
368  %cond = icmp slt i64 %i.next, %n
369  br i1 %cond, label %for.body, label %for.end
370
371for.end:                                          ; preds = %for.inc
372  ret void
373}
374
375@AB = common global [1024 x i32] zeroinitializer, align 4
376@CD = common global [1024 x i32] zeroinitializer, align 4
377
378define void @print_interleave_groups(i32 %C, i32 %D) {
379; CHECK-LABEL: Checking a loop in 'print_interleave_groups'
380; CHECK:       VPlan 'Initial VPlan for VF={4},UF>=1' {
381; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
382; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
383; CHECK-NEXT: Live-in ir<256> = original trip-count
384; CHECK-EMPTY:
385; CHECK-NEXT: ir-bb<entry>:
386; CHECK-NEXT: Successor(s): vector.ph
387; CHECK-EMPTY:
388; CHECK-NEXT: vector.ph:
389; CHECK-NEXT:   vp<[[IV_END:%.+]]> = DERIVED-IV ir<0> + vp<[[VTC]]> * ir<4>
390; CHECK-NEXT: Successor(s): vector loop
391; CHECK-EMPTY:
392; CHECK-NEXT: <x1> vector loop: {
393; CHECK-NEXT:  vector.body:
394; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
395; CHECK-NEXT:   vp<[[DERIVED_IV:%.+]]> = DERIVED-IV ir<0> + vp<[[CAN_IV]]> * ir<4>
396; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[DERIVED_IV]]>, ir<4>
397; CHECK-NEXT:   CLONE ir<%gep.AB.0> = getelementptr inbounds ir<@AB>, ir<0>, vp<[[STEPS]]>
398; CHECK-NEXT:   INTERLEAVE-GROUP with factor 4 at %AB.0, ir<%gep.AB.0>
399; CHECK-NEXT:     ir<%AB.0> = load from index 0
400; CHECK-NEXT:     ir<%AB.1> = load from index 1
401; CHECK-NEXT:     ir<%AB.3> = load from index 3
402; CHECK-NEXT:   WIDEN ir<%add> = add nsw ir<%AB.0>, ir<%AB.1>
403; CHECK-NEXT:   CLONE ir<%gep.CD.0> = getelementptr inbounds ir<@CD>, ir<0>, vp<[[STEPS]]>
404; CHECK-NEXT:   INTERLEAVE-GROUP with factor 4 at <badref>, ir<%gep.CD.0>
405; CHECK-NEXT:     store ir<%add> to index 0
406; CHECK-NEXT:     store ir<1> to index 1
407; CHECK-NEXT:     store ir<2> to index 2
408; CHECK-NEXT:     store ir<%AB.3> to index 3
409; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
410; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
411; CHECK-NEXT: No successors
412; CHECK-NEXT: }
413; CHECK-NEXT: Successor(s): middle.block
414; CHECK-EMPTY:
415; CHECK-NEXT: middle.block:
416; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<256>, vp<[[VTC]]>
417; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
418; CHECK-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
419; CHECK-EMPTY:
420; CHECK-NEXT: scalar.ph
421; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[IV_END]]>, ir<0>
422; CHECK-NEXT:  Successor(s): ir-bb<for.body>
423; CHECK-EMPTY:
424; CHECK-NEXT:  ir-bb<for.body>:
425; CHECK-NEXT:    IR   %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
426; CHECK:         IR   %cmp = icmp slt i64 %iv.next, 1024
427; CHECK-NEXT: No successors
428; CHECK-EMPTY:
429; CHECK-NEXT: ir-bb<for.end>
430; CHECK-NEXT: No successors
431; CHECK-NEXT: }
432;
433entry:
434  br label %for.body
435
436for.body:
437  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
438  %gep.AB.0= getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 %iv
439  %AB.0 = load i32, ptr %gep.AB.0, align 4
440  %iv.plus.1 = add i64 %iv, 1
441  %gep.AB.1 = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 %iv.plus.1
442  %AB.1 = load i32, ptr %gep.AB.1, align 4
443  %iv.plus.2 = add i64 %iv, 2
444  %iv.plus.3 = add i64 %iv, 3
445  %gep.AB.3 = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 %iv.plus.3
446  %AB.3 = load i32, ptr %gep.AB.3, align 4
447  %add = add nsw i32 %AB.0, %AB.1
448  %gep.CD.0 = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 %iv
449  store i32 %add, ptr %gep.CD.0, align 4
450  %gep.CD.1 = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 %iv.plus.1
451  store i32 1, ptr %gep.CD.1, align 4
452  %gep.CD.2 = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 %iv.plus.2
453  store i32 2, ptr %gep.CD.2, align 4
454  %gep.CD.3 = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 %iv.plus.3
455  store i32 %AB.3, ptr %gep.CD.3, align 4
456  %iv.next = add nuw nsw i64 %iv, 4
457  %cmp = icmp slt i64 %iv.next, 1024
458  br i1 %cmp, label %for.body, label %for.end
459
460for.end:
461  ret void
462}
463
464define float @print_fmuladd_strict(ptr %a, ptr %b, i64 %n) {
465; CHECK-LABEL: Checking a loop in 'print_fmuladd_strict'
466; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
467; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
468; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
469; CHECK-NEXT: Live-in ir<%n> = original trip-count
470; CHECK-EMPTY:
471; CHECK-NEXT: ir-bb<entry>:
472; CHECK-NEXT: Successor(s): vector.ph
473; CHECK-EMPTY:
474; CHECK-NEXT: vector.ph:
475; CHECK-NEXT: Successor(s): vector loop
476; CHECK-EMPTY:
477; CHECK-NEXT: <x1> vector loop: {
478; CHECK-NEXT: vector.body:
479; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
480; CHECK-NEXT:   WIDEN-REDUCTION-PHI ir<%sum.07> = phi ir<0.000000e+00>, ir<%muladd>
481; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
482; CHECK-NEXT:   CLONE ir<%arrayidx> = getelementptr inbounds ir<%a>, vp<[[STEPS]]>
483; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%arrayidx>
484; CHECK-NEXT:   WIDEN ir<%l.a> = load vp<[[VEC_PTR]]>
485; CHECK-NEXT:   CLONE ir<%arrayidx2> = getelementptr inbounds ir<%b>, vp<[[STEPS]]>
486; CHECK-NEXT:   vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%arrayidx2>
487; CHECK-NEXT:   WIDEN ir<%l.b> = load vp<[[VEC_PTR2]]>
488; CHECK-NEXT:   EMIT vp<[[FMUL:%.+]]> = fmul nnan ninf nsz ir<%l.a>, ir<%l.b>
489; CHECK-NEXT:   REDUCE ir<[[MULADD:%.+]]> = ir<%sum.07> + nnan ninf nsz reduce.fadd (vp<[[FMUL]]>)
490; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
491; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
492; CHECK-NEXT:   No successors
493; CHECK-NEXT: }
494; CHECK-NEXT: Successor(s): middle.block
495; CHECK-EMPTY:
496; CHECK-NEXT: middle.block:
497; CHECK-NEXT:   EMIT vp<[[RED_RES:%.+]]> = compute-reduction-result ir<%sum.07>, ir<[[MULADD]]>
498; CHECK-NEXT:   EMIT vp<[[RED_EX:%.+]]> = extract-from-end vp<[[RED_RES]]>, ir<1>
499; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]>
500; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
501; CHECK-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
502; CHECK-EMPTY:
503; CHECK-NEXT: scalar.ph
504; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
505; CHECK-NEXT:   EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RED_RES]]>, ir<0.000000e+00>
506; CHECK-NEXT:  Successor(s): ir-bb<for.body>
507; CHECK-EMPTY:
508; CHECK-NEXT:  ir-bb<for.body>:
509; CHECK-NEXT:    IR   %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
510; CHECK-NEXT:    IR   %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %for.body ] (extra operand: vp<[[RED_RESUME]]> from scalar.ph)
511; CHECK:         IR   %exitcond.not = icmp eq i64 %iv.next, %n
512; CHECK-NEXT: No successors
513; CHECK-EMPTY:
514; CHECK-NEXT: ir-bb<for.end>
515; CHECK-NEXT:   IR %muladd.lcssa = phi float [ %muladd, %for.body ] (extra operand: vp<[[RED_EX]]> from middle.block)
516; CHECK-NEXT: No successors
517; CHECK-NEXT:}
518
519entry:
520  br label %for.body
521
522for.body:
523  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
524  %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %for.body ]
525  %arrayidx = getelementptr inbounds float, ptr %a, i64 %iv
526  %l.a = load float, ptr %arrayidx, align 4
527  %arrayidx2 = getelementptr inbounds float, ptr %b, i64 %iv
528  %l.b = load float, ptr %arrayidx2, align 4
529  %muladd = tail call nnan ninf nsz float @llvm.fmuladd.f32(float %l.a, float %l.b, float %sum.07)
530  %iv.next = add nuw nsw i64 %iv, 1
531  %exitcond.not = icmp eq i64 %iv.next, %n
532  br i1 %exitcond.not, label %for.end, label %for.body
533
534for.end:
535  ret float %muladd
536}
537
538define void @debug_loc_vpinstruction(ptr nocapture %asd, ptr nocapture %bsd) !dbg !5 {
539; CHECK-LABEL: Checking a loop in 'debug_loc_vpinstruction'
540; CHECK:    VPlan 'Initial VPlan for VF={4},UF>=1' {
541; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
542; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
543; CHECK-NEXT: Live-in ir<128> = original trip-count
544; CHECK-EMPTY:
545; CHECK-NEXT: ir-bb<entry>:
546; CHECK-NEXT: Successor(s): vector.ph
547; CHECK-EMPTY:
548; CHECK-NEXT: vector.ph:
549; CHECK-NEXT: Successor(s): vector loop
550; CHECK-EMPTY:
551; CHECK-NEXT: <x1> vector loop: {
552; CHECK-NEXT:  vector.body:
553; CHECK-NEXT:    EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
554; CHECK-NEXT:    vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
555; CHECK-NEXT:    CLONE ir<%isd> = getelementptr inbounds ir<%asd>, vp<[[STEPS]]>
556; CHECK-NEXT:    vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%isd>
557; CHECK-NEXT:    WIDEN ir<%lsd> = load vp<[[VEC_PTR]]>
558; CHECK-NEXT:    WIDEN ir<%psd> = add nuw nsw ir<%lsd>, ir<23>
559; CHECK-NEXT:    WIDEN ir<%cmp1> = icmp slt ir<%lsd>, ir<100>
560; CHECK-NEXT:    EMIT vp<[[NOT1:%.+]]> = not ir<%cmp1>, !dbg /tmp/s.c:5:3
561; CHECK-NEXT:    WIDEN ir<%cmp2> = icmp sge ir<%lsd>, ir<200>
562; CHECK-NEXT:    EMIT vp<[[SEL1:%.+]]> = logical-and vp<[[NOT1]]>, ir<%cmp2>, !dbg /tmp/s.c:5:21
563; CHECK-NEXT:    EMIT vp<[[OR1:%.+]]> = or vp<[[SEL1]]>, ir<%cmp1>
564; CHECK-NEXT:  Successor(s): pred.sdiv
565; CHECK-EMPTY:
566; CHECK-NEXT:  <xVFxUF> pred.sdiv: {
567; CHECK-NEXT:    pred.sdiv.entry:
568; CHECK-NEXT:      BRANCH-ON-MASK vp<[[OR1]]>
569; CHECK-NEXT:    Successor(s): pred.sdiv.if, pred.sdiv.continue
570; CHECK-EMPTY:
571; CHECK-NEXT:    pred.sdiv.if:
572; CHECK-NEXT:      REPLICATE ir<%sd1> = sdiv ir<%psd>, ir<%lsd> (S->V)
573; CHECK-NEXT:    Successor(s): pred.sdiv.continue
574; CHECK-EMPTY:
575; CHECK-NEXT:    pred.sdiv.continue:
576; CHECK-NEXT:      PHI-PREDICATED-INSTRUCTION vp<[[PHI:%.+]]> = ir<%sd1>
577; CHECK-NEXT:    No successors
578; CHECK-NEXT:  }
579; CHECK-NEXT:  Successor(s): if.then.0
580; CHECK-EMPTY:
581; CHECK-NEXT:  if.then.0:
582; CHECK-NEXT:    EMIT vp<[[NOT2:%.+]]> = not ir<%cmp2>
583; CHECK-NEXT:    EMIT vp<[[SEL2:%.+]]> = logical-and vp<[[NOT1]]>, vp<[[NOT2]]>
584; CHECK-NEXT:    BLEND ir<%ysd.0> = vp<[[PHI]]> ir<%psd>/vp<[[SEL2]]>
585; CHECK-NEXT:    vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%isd>
586; CHECK-NEXT:    WIDEN store vp<[[VEC_PTR2]]>, ir<%ysd.0>
587; CHECK-NEXT:    EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
588; CHECK-NEXT:    EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
589; CHECK-NEXT:  No successors
590; CHECK-NEXT:}
591; CHECK-NEXT: Successor(s): middle.block
592; CHECK-EMPTY:
593; CHECK-NEXT: middle.block:
594; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<128>, vp<[[VTC]]>
595; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
596; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
597; CHECK-EMPTY:
598; CHECK-NEXT: scalar.ph:
599; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
600; CHECK-NEXT:  Successor(s): ir-bb<loop>
601; CHECK-EMPTY:
602; CHECK-NEXT:  ir-bb<loop>:
603; CHECK-NEXT:    IR   %iv = phi i64 [ 0, %entry ], [ %iv.next, %if.end ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
604; CHECK:         IR   %cmp1 = icmp slt i32 %lsd, 100
605; CHECK-NEXT: No successors
606; CHECK-EMPTY:
607; CHECK-NEXT: ir-bb<exit>
608; CHECK-NEXT: No successors
609; CHECK-NEXT:}
610;
611entry:
612  br label %loop
613
614loop:
615  %iv = phi i64 [ 0, %entry ], [ %iv.next, %if.end ]
616  %isd = getelementptr inbounds i32, ptr %asd, i64 %iv
617  %lsd = load i32, ptr %isd, align 4
618  %psd = add nuw nsw i32 %lsd, 23
619  %cmp1 = icmp slt i32 %lsd, 100
620  br i1 %cmp1, label %if.then, label %check, !dbg !7
621
622check:
623  %cmp2 = icmp sge i32 %lsd, 200
624  br i1 %cmp2, label %if.then, label %if.end, !dbg !8
625
626if.then:
627  %sd1 = sdiv i32 %psd, %lsd
628  br label %if.end
629
630if.end:
631  %ysd.0 = phi i32 [ %sd1, %if.then ], [ %psd, %check ]
632  store i32 %ysd.0, ptr %isd, align 4
633  %iv.next = add nuw nsw i64 %iv, 1
634  %exitcond = icmp eq i64 %iv.next, 128
635  br i1 %exitcond, label %exit, label %loop
636
637exit:
638  ret void
639}
640
641declare float @llvm.sqrt.f32(float) nounwind readnone
642declare float @llvm.fmuladd.f32(float, float, float)
643
644define void @print_expand_scev(i64 %y, ptr %ptr) {
645; CHECK-LABEL: Checking a loop in 'print_expand_scev'
646; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
647; CHECK-NEXT: Live-in vp<[[VF:%.*]]> = VF
648; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
649; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
650; CHECK-NEXT: vp<[[TC:%.+]]> = original trip-count
651; CHECK-EMPTY:
652; CHECK-NEXT: ir-bb<entry>:
653; CHECK-NEXT:   IR %div = udiv i64 %y, 492802768830814060
654; CHECK-NEXT:   IR %inc = add i64 %div, 1
655; CHECK-NEXT:   EMIT vp<[[TC]]> = EXPAND SCEV (1 + ((15 + (%y /u 492802768830814060))<nuw><nsw> /u (1 + (%y /u 492802768830814060))<nuw><nsw>))<nuw><nsw>
656; CHECK-NEXT:   EMIT vp<[[EXP_SCEV:%.+]]> = EXPAND SCEV (1 + (%y /u 492802768830814060))<nuw><nsw>
657; CHECK-NEXT: Successor(s): vector.ph
658; CHECK-EMPTY:
659; CHECK-NEXT: vector.ph:
660; CHECK-NEXT:   vp<[[IV_END:%.+]]> = DERIVED-IV ir<0> + vp<[[VTC]]> * vp<[[EXP_SCEV]]>
661; CHECK-NEXT: Successor(s): vector loop
662; CHECK-EMPTY:
663; CHECK-NEXT: <x1> vector loop: {
664; CHECK-NEXT:   vector.body:
665; CHECK-NEXT:     EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
666; CHECK-NEXT:     ir<%iv> = WIDEN-INDUCTION ir<0>, vp<[[EXP_SCEV]]>, vp<[[VF]]> (truncated to i8)
667; CHECK-NEXT:     vp<[[DERIVED_IV:%.+]]> = DERIVED-IV ir<0> + vp<[[CAN_IV]]> * vp<[[EXP_SCEV]]>
668; CHECK-NEXT:     vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[DERIVED_IV]]>, vp<[[EXP_SCEV]]>
669; CHECK-NEXT:     WIDEN ir<%v3> = add nuw ir<%iv>, ir<1>
670; CHECK-NEXT:     REPLICATE ir<%gep> = getelementptr inbounds ir<%ptr>, vp<[[STEPS]]>
671; CHECK-NEXT:     REPLICATE store ir<%v3>, ir<%gep>
672; CHECK-NEXT:     EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
673; CHECK-NEXT:     EMIT branch-on-count  vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
674; CHECK-NEXT:   No successors
675; CHECK-NEXT: }
676; CHECK-NEXT: Successor(s): middle.block
677; CHECK-EMPTY:
678; CHECK-NEXT: middle.block:
679; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq vp<[[TC]]>, vp<[[VTC]]>
680; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
681; CHECK-NEXT: Successor(s): ir-bb<loop.exit>, scalar.ph
682; CHECK-EMPTY:
683; CHECK-NEXT: scalar.ph
684; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[IV_END]]>, ir<0>
685; CHECK-NEXT:  Successor(s): ir-bb<loop>
686; CHECK-EMPTY:
687; CHECK-NEXT:  ir-bb<loop>:
688; CHECK-NEXT:    IR   %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
689; CHECK:         IR   %iv.next = add i64 %iv, %inc
690; CHECK-NEXT: No successors
691; CHECK-EMPTY:
692; CHECK-NEXT: ir-bb<loop.exit>
693; CHECK-NEXT: No successors
694; CHECK-NEXT: }
695;
696entry:
697  %div = udiv i64 %y, 492802768830814060
698  %inc = add i64 %div, 1
699  br label %loop
700
701loop:                                             ; preds = %loop, %entry
702  %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
703  %v2 = trunc i64 %iv to i8
704  %v3 = add nuw i8 %v2, 1
705  %gep = getelementptr inbounds i8, ptr %ptr, i64 %iv
706  store i8 %v3, ptr %gep
707
708  %cmp15 = icmp slt i8 %v3, 10000
709  %iv.next = add i64 %iv, %inc
710  br i1 %cmp15, label %loop, label %loop.exit
711
712loop.exit:
713  ret void
714}
715
716define i32 @print_exit_value(ptr %ptr, i32 %off) {
717; CHECK-LABEL: Checking a loop in 'print_exit_value'
718; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
719; CHECK-NEXT: Live-in vp<[[VF:%.]]> = VF
720; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
721; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
722; CHECK-NEXT: Live-in ir<1000> = original trip-count
723; CHECK-EMPTY:
724; CHECK-NEXT: ir-bb<entry>:
725; CHECK-NEXT: Successor(s): vector.ph
726; CHECK-EMPTY:
727; CHECK-NEXT: vector.ph:
728; CHECK-NEXT: Successor(s): vector loop
729; CHECK-EMPTY:
730; CHECK-NEXT: <x1> vector loop: {
731; CHECK-NEXT:   vector.body:
732; CHECK-NEXT:    EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
733; CHECK-NEXT:     ir<%iv> = WIDEN-INDUCTION ir<0>, ir<1>, vp<[[VF]]>
734; CHECK-NEXT:     vp<[[STEPS:%.+]]>    = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
735; CHECK-NEXT:     CLONE ir<%gep> = getelementptr inbounds ir<%ptr>, vp<[[STEPS]]>
736; CHECK-NEXT:     WIDEN ir<%add> = add ir<%iv>, ir<%off>
737; CHECK-NEXT:     vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep>
738; CHECK-NEXT:     WIDEN store vp<[[VEC_PTR]]>, ir<0>
739; CHECK-NEXT:     EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
740; CHECK-NEXT:     EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
741; CHECK-NEXT:   No successors
742; CHECK-NEXT: }
743; CHECK-NEXT: Successor(s): middle.block
744; CHECK-EMPTY:
745; CHECK-NEXT: middle.block:
746; CHECK-NEXT:   EMIT vp<[[EXIT:%.+]]> = extract-from-end ir<%add>, ir<1>
747; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<1000>, vp<[[VTC]]>
748; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
749; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
750; CHECK-EMPTY:
751; CHECK-NEXT: scalar.ph
752; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
753; CHECK-NEXT:  Successor(s): ir-bb<loop>
754; CHECK-EMPTY:
755; CHECK-NEXT:  ir-bb<loop>:
756; CHECK-NEXT:    IR   %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
757; CHECK:         IR   %ec = icmp eq i32 %iv.next, 1000
758; CHECK-NEXT: No successors
759; CHECK-EMPTY:
760; CHECK-NEXT: ir-bb<exit>
761; CHECK-NEXT:   IR %lcssa = phi i32 [ %add, %loop ] (extra operand: vp<[[EXIT]]> from middle.block)
762; CHECK-NEXT: No successors
763; CHECK-NEXT: }
764;
765entry:
766  br label %loop
767
768loop:
769  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
770  %gep = getelementptr inbounds i8, ptr %ptr, i32 %iv
771  %add = add i32 %iv, %off
772  store i8 0, ptr %gep
773  %iv.next = add nsw i32 %iv, 1
774  %ec = icmp eq i32 %iv.next, 1000
775  br i1 %ec, label %exit, label %loop
776
777exit:
778  %lcssa = phi i32 [ %add, %loop ]
779  ret i32 %lcssa
780}
781
782define void @print_fast_math_flags(i64 %n, ptr noalias %y, ptr noalias %x, ptr %z) {
783; CHECK-LABEL: Checking a loop in 'print_fast_math_flags'
784; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
785; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
786; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
787; CHECK-NEXT: Live-in ir<%n> = original trip-count
788; CHECK-EMPTY:
789; CHECK-NEXT: ir-bb<entry>:
790; CHECK-NEXT: Successor(s): vector.ph
791; CHECK-EMPTY:
792; CHECK-NEXT: vector.ph:
793; CHECK-NEXT: Successor(s): vector loop
794; CHECK-EMPTY:
795; CHECK-NEXT: <x1> vector loop: {
796; CHECK-NEXT: vector.body:
797; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
798; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
799; CHECK-NEXT:   CLONE ir<%gep.y> = getelementptr inbounds ir<%y>, vp<[[STEPS]]>
800; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.y>
801; CHECK-NEXT:   WIDEN ir<%lv> = load vp<[[VEC_PTR]]>
802; CHECK-NEXT:   WIDEN ir<%add> = fadd nnan ir<%lv>, ir<1.000000e+00>
803; CHECK-NEXT:   WIDEN ir<%mul> = fmul reassoc nnan ninf nsz arcp contract afn ir<%add>, ir<2.000000e+00>
804; CHECK-NEXT:   WIDEN ir<%div> = fdiv reassoc nsz contract ir<%mul>, ir<2.000000e+00>
805; CHECK-NEXT:   CLONE ir<%gep.x> = getelementptr inbounds ir<%x>, vp<[[STEPS]]>
806; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.x>
807; CHECK-NEXT:   WIDEN store vp<[[VEC_PTR]]>, ir<%div>
808; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
809; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
810; CHECK-NEXT: No successors
811; CHECK-NEXT: }
812; CHECK-NEXT: Successor(s): middle.block
813; CHECK-EMPTY:
814; CHECK-NEXT: middle.block:
815; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]>
816; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
817; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
818; CHECK-EMPTY:
819; CHECK-NEXT: scalar.ph
820; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
821; CHECK-NEXT:  Successor(s): ir-bb<loop>
822; CHECK-EMPTY:
823; CHECK-NEXT:  ir-bb<loop>:
824; CHECK-NEXT:    IR   %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
825; CHECK:         IR   %exitcond = icmp eq i64 %iv.next, %n
826; CHECK-NEXT: No successors
827; CHECK-EMPTY:
828; CHECK-NEXT: ir-bb<exit>
829; CHECK-NEXT: No successors
830; CHECK-NEXT: }
831;
832entry:
833  br label %loop
834
835loop:
836  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
837  %gep.y = getelementptr inbounds float, ptr %y, i64 %iv
838  %lv = load float, ptr %gep.y, align 4
839  %add = fadd nnan float %lv, 1.0
840  %mul = fmul fast float %add, 2.0
841  %div = fdiv nsz reassoc contract float %mul, 2.0
842  %gep.x = getelementptr inbounds float, ptr %x, i64 %iv
843  store float %div, ptr %gep.x, align 4
844  %iv.next = add i64 %iv, 1
845  %exitcond = icmp eq i64 %iv.next, %n
846  br i1 %exitcond, label %exit, label %loop
847
848exit:
849  ret void
850}
851
852define void @print_exact_flags(i64 %n, ptr noalias %x) {
853; CHECK-LABEL: Checking a loop in 'print_exact_flags'
854; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
855; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
856; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
857; CHECK-NEXT: Live-in ir<%n> = original trip-count
858; CHECK-EMPTY:
859; CHECK-NEXT: ir-bb<entry>:
860; CHECK-NEXT: Successor(s): vector.ph
861; CHECK-EMPTY:
862; CHECK-NEXT: vector.ph:
863; CHECK-NEXT: Successor(s): vector loop
864; CHECK-EMPTY:
865; CHECK-NEXT: <x1> vector loop: {
866; CHECK-NEXT: vector.body:
867; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
868; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
869; CHECK-NEXT:   CLONE ir<%gep.x> = getelementptr inbounds ir<%x>, vp<[[STEPS]]>
870; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.x>
871; CHECK-NEXT:   WIDEN ir<%lv> = load vp<[[VEC_PTR]]>
872; CHECK-NEXT:   WIDEN ir<%div.1> = udiv exact ir<%lv>, ir<20>
873; CHECK-NEXT:   WIDEN ir<%div.2> = udiv ir<%lv>, ir<60>
874; CHECK-NEXT:   WIDEN ir<%add> = add nuw nsw ir<%div.1>, ir<%div.2>
875; CHECK-NEXT:   vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%gep.x>
876; CHECK-NEXT:   WIDEN store vp<[[VEC_PTR2]]>, ir<%add>
877; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
878; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
879; CHECK-NEXT: No successors
880; CHECK-NEXT: }
881; CHECK-NEXT: Successor(s): middle.block
882; CHECK-EMPTY:
883; CHECK-NEXT: middle.block:
884; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]>
885; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
886; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
887; CHECK-EMPTY:
888; CHECK-NEXT: scalar.ph
889; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
890; CHECK-NEXT:  Successor(s): ir-bb<loop>
891; CHECK-EMPTY:
892; CHECK-NEXT:  ir-bb<loop>:
893; CHECK-NEXT:    IR   %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
894; CHECK:         IR   %exitcond = icmp eq i64 %iv.next, %n
895; CHECK-NEXT: No successors
896; CHECK-EMPTY:
897; CHECK-NEXT: ir-bb<exit>
898; CHECK-NEXT: No successors
899; CHECK-NEXT: }
900;
901entry:
902  br label %loop
903
904loop:
905  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
906  %gep.x = getelementptr inbounds i32, ptr %x, i64 %iv
907  %lv = load i32, ptr %gep.x, align 4
908  %div.1 = udiv exact i32 %lv, 20
909  %div.2 = udiv i32 %lv, 60
910  %add = add nsw nuw i32 %div.1, %div.2
911  store i32 %add, ptr %gep.x, align 4
912  %iv.next = add i64 %iv, 1
913  %exitcond = icmp eq i64 %iv.next, %n
914  br i1 %exitcond, label %exit, label %loop
915
916exit:
917  ret void
918}
919
920define void @print_call_flags(ptr readonly %src, ptr noalias %dest, i64 %n) {
921; CHECK-LABEL: Checking a loop in 'print_call_flags'
922; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
923; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
924; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
925; CHECK-NEXT: Live-in ir<%n> = original trip-count
926; CHECK-EMPTY:
927; CHECK-NEXT: ir-bb<entry>:
928; CHECK-NEXT: Successor(s): vector.ph
929; CHECK-EMPTY:
930; CHECK-NEXT: vector.ph:
931; CHECK-NEXT: Successor(s): vector loop
932; CHECK-EMPTY:
933; CHECK-NEXT: <x1> vector loop: {
934; CHECK-NEXT: vector.body:
935; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
936; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
937; CHECK-NEXT:   CLONE ir<%ld.addr> = getelementptr inbounds ir<%src>, vp<[[STEPS]]>
938; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%ld.addr>
939; CHECK-NEXT:   WIDEN ir<%ld.value> = load vp<[[VEC_PTR]]>
940; CHECK-NEXT:   WIDEN ir<%ifcond> = fcmp oeq ir<%ld.value>, ir<5.000000e+00>
941; CHECK-NEXT:  Successor(s): pred.call
942; CHECK-EMPTY:
943; CHECK-NEXT:  <xVFxUF> pred.call: {
944; CHECK-NEXT:    pred.call.entry:
945; CHECK-NEXT:      BRANCH-ON-MASK ir<%ifcond>
946; CHECK-NEXT:    Successor(s): pred.call.if, pred.call.continue
947; CHECK-EMPTY:
948; CHECK-NEXT:    pred.call.if:
949; CHECK-NEXT:      REPLICATE ir<%foo.ret.1> = call nnan ninf nsz @foo(ir<%ld.value>) (S->V)
950; CHECK-NEXT:      REPLICATE ir<%foo.ret.2> = call @foo(ir<%ld.value>) (S->V)
951; CHECK-NEXT:    Successor(s): pred.call.continue
952; CHECK-EMPTY:
953; CHECK-NEXT:    pred.call.continue:
954; CHECK-NEXT:      PHI-PREDICATED-INSTRUCTION vp<[[PHI1:%.+]]> = ir<%foo.ret.1>
955; CHECK-NEXT:      PHI-PREDICATED-INSTRUCTION vp<[[PHI2:%.+]]> = ir<%foo.ret.2>
956; CHECK-NEXT:    No successors
957; CHECK-NEXT:  }
958; CHECK-NEXT:  Successor(s): if.then.1
959; CHECK-EMPTY:
960; CHECK-NEXT:  if.then.1:
961; CHECK-NEXT:    WIDEN ir<%fadd> = fadd vp<[[PHI1]]>, vp<[[PHI2]]>
962; CHECK-NEXT:    BLEND ir<%st.value> = ir<%ld.value> ir<%fadd>/ir<%ifcond>
963; CHECK-NEXT:    CLONE ir<%st.addr> = getelementptr inbounds ir<%dest>, vp<[[STEPS]]>
964; CHECK-NEXT:    vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%st.addr>
965; CHECK-NEXT:    WIDEN store vp<[[VEC_PTR2]]>, ir<%st.value>
966; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
967; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
968; CHECK-NEXT: No successors
969; CHECK-NEXT: }
970; CHECK-NEXT: Successor(s): middle.block
971; CHECK-EMPTY:
972; CHECK-NEXT: middle.block:
973; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]>
974; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
975; CHECK-NEXT: Successor(s): ir-bb<end>, scalar.ph
976; CHECK-EMPTY:
977; CHECK-NEXT: scalar.ph
978; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
979; CHECK-NEXT:  Successor(s): ir-bb<for.body>
980; CHECK-EMPTY:
981; CHECK-NEXT:  ir-bb<for.body>:
982; CHECK-NEXT:    IR   %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.loop ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
983; CHECK:         IR   %ifcond = fcmp oeq float %ld.value, 5.0
984; CHECK-NEXT: No successors
985; CHECK-EMPTY:
986; CHECK-NEXT: ir-bb<end>
987; CHECK-NEXT: No successors
988; CHECK-NEXT: }
989;
990entry:
991  br label %for.body
992
993for.body:
994  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.loop ]
995  %ld.addr = getelementptr inbounds float, ptr %src, i64 %iv
996  %ld.value = load float , ptr %ld.addr, align 8
997  %ifcond = fcmp oeq float %ld.value, 5.0
998  br i1 %ifcond, label %if.then, label %for.loop
999
1000if.then:
1001  %foo.ret.1 = call nnan nsz ninf float @foo(float %ld.value) #0
1002  %foo.ret.2 = call float @foo(float %ld.value) #0
1003  %fadd = fadd float %foo.ret.1, %foo.ret.2
1004  br label %for.loop
1005
1006for.loop:
1007  %st.value = phi float [ %ld.value, %for.body ], [ %fadd, %if.then ]
1008  %st.addr = getelementptr inbounds float, ptr %dest, i64 %iv
1009  store float %st.value, ptr %st.addr, align 8
1010  %iv.next = add nsw nuw i64 %iv, 1
1011  %loopcond = icmp eq i64 %iv.next, %n
1012  br i1 %loopcond, label %end, label %for.body
1013
1014end:
1015  ret void
1016}
1017
1018; FIXME: Preserve disjoint flag on OR recipe.
1019define void @print_disjoint_flags(i64 %n, ptr noalias %x) {
1020; CHECK-LABEL: Checking a loop in 'print_disjoint_flags'
1021; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
1022; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF
1023; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
1024; CHECK-NEXT: Live-in ir<%n> = original trip-count
1025; CHECK-EMPTY:
1026; CHECK-NEXT: ir-bb<entry>:
1027; CHECK-NEXT: Successor(s): vector.ph
1028; CHECK-EMPTY:
1029; CHECK-NEXT: vector.ph:
1030; CHECK-NEXT: Successor(s): vector loop
1031; CHECK-EMPTY:
1032; CHECK-NEXT: <x1> vector loop: {
1033; CHECK-NEXT: vector.body:
1034; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
1035; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
1036; CHECK-NEXT:   CLONE ir<%gep.x> = getelementptr inbounds ir<%x>, vp<[[STEPS]]>
1037; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.x>
1038; CHECK-NEXT:   WIDEN ir<%lv> = load vp<[[VEC_PTR]]>
1039; CHECK-NEXT:   WIDEN ir<%or.1> = or disjoint ir<%lv>, ir<1>
1040; CHECK-NEXT:   WIDEN ir<%or.2> = or ir<%lv>, ir<3>
1041; CHECK-NEXT:   WIDEN ir<%add> = add nuw nsw ir<%or.1>, ir<%or.2>
1042; CHECK-NEXT:   vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.x>
1043; CHECK-NEXT:   WIDEN store vp<[[VEC_PTR]]>, ir<%add>
1044; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
1045; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
1046; CHECK-NEXT: No successors
1047; CHECK-NEXT: }
1048; CHECK-NEXT: Successor(s): middle.block
1049; CHECK-EMPTY:
1050; CHECK-NEXT: middle.block:
1051; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]>
1052; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
1053; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
1054; CHECK-EMPTY:
1055; CHECK-NEXT: scalar.ph
1056; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
1057; CHECK-NEXT:  Successor(s): ir-bb<loop>
1058; CHECK-EMPTY:
1059; CHECK-NEXT:  ir-bb<loop>:
1060; CHECK-NEXT:    IR   %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
1061; CHECK:         IR   %exitcond = icmp eq i64 %iv.next, %n
1062; CHECK-NEXT: No successors
1063; CHECK-EMPTY:
1064; CHECK-NEXT: ir-bb<exit>
1065; CHECK-NEXT: No successors
1066; CHECK-NEXT: }
1067;
1068entry:
1069  br label %loop
1070
1071loop:
1072  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
1073  %gep.x = getelementptr inbounds i32, ptr %x, i64 %iv
1074  %lv = load i32, ptr %gep.x, align 4
1075  %or.1 = or disjoint i32 %lv, 1
1076  %or.2 = or i32 %lv, 3
1077  %add = add nsw nuw i32 %or.1, %or.2
1078  store i32 %add, ptr %gep.x, align 4
1079  %iv.next = add i64 %iv, 1
1080  %exitcond = icmp eq i64 %iv.next, %n
1081  br i1 %exitcond, label %exit, label %loop
1082
1083exit:
1084  ret void
1085}
1086
1087define void @zext_nneg(ptr noalias %p, ptr noalias %p1) {
1088; CHECK-LABEL: LV: Checking a loop in 'zext_nneg'
1089; CHECK:       VPlan 'Initial VPlan for VF={4},UF>=1' {
1090; CHECK-NEXT:  Live-in vp<[[VFxUF:%.]]> = VF * UF
1091; CHECK-NEXT:  Live-in vp<[[VTC:%.+]]> = vector-trip-count
1092; CHECK-NEXT:  Live-in ir<1000> = original trip-count
1093; CHECK-EMPTY:
1094; CHECK-NEXT: ir-bb<entry>:
1095; CHECK-NEXT: Successor(s): vector.ph
1096; CHECK-EMPTY:
1097; CHECK-NEXT:  vector.ph:
1098; CHECK-NEXT:  Successor(s): vector loop
1099; CHECK-EMPTY:
1100; CHECK-NEXT:  <x1> vector loop: {
1101; CHECK-NEXT:  vector.body:
1102; CHECK-NEXT:    EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]>
1103; CHECK-NEXT:    vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
1104; CHECK-NEXT:    CLONE ir<%idx> = getelementptr ir<%p>, vp<[[STEPS]]>
1105; CHECK-NEXT:    vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%idx>
1106; CHECK-NEXT:    WIDEN ir<%l> = load vp<[[VEC_PTR]]>
1107; CHECK-NEXT:    WIDEN-CAST ir<%zext> = zext nneg ir<%l>
1108; CHECK-NEXT:    REPLICATE store ir<%zext>, ir<%p1>
1109; CHECK-NEXT:    EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>
1110; CHECK-NEXT:    EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
1111; CHECK-NEXT:  No successors
1112; CHECK-NEXT: }
1113;
1114entry:
1115  br label %body
1116
1117body:
1118  %iv = phi i64 [ %next, %body ], [ 0, %entry ]
1119  %idx = getelementptr i32, ptr %p, i64 %iv
1120  %l = load i32, ptr %idx, align 8
1121  %zext = zext nneg i32 %l to i64
1122  store i64 %zext, ptr %p1, align 8
1123  %next = add i64 %iv, 1
1124  %cmp = icmp eq i64 %next, 1000
1125  br i1 %cmp, label %exit, label %body
1126
1127exit:
1128  ret void
1129}
1130
1131define i16 @print_first_order_recurrence_and_result(ptr %ptr) {
1132; CHECK-LABEL: 'print_first_order_recurrence_and_result'
1133; CHECK:      VPlan 'Initial VPlan for VF={4},UF>=1' {
1134; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF
1135; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
1136; CHECK-NEXT: Live-in ir<1000> = original trip-count
1137; CHECK-EMPTY:
1138; CHECK-NEXT: ir-bb<entry>:
1139; CHECK-NEXT: Successor(s): vector.ph
1140; CHECK-EMPTY:
1141; CHECK-NEXT: vector.ph:
1142; CHECK-NEXT: Successor(s): vector loop
1143; CHECK-EMPTY:
1144; CHECK-NEXT: <x1> vector loop: {
1145; CHECK-NEXT:   vector.body:
1146; CHECK-NEXT:     EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
1147; CHECK-NEXT:     FIRST-ORDER-RECURRENCE-PHI ir<%for.1> = phi ir<22>, ir<%for.1.next>
1148; CHECK-NEXT:     vp<[[STEPS:%.+]]>    = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
1149; CHECK-NEXT:     CLONE ir<%gep.ptr> = getelementptr inbounds ir<%ptr>, vp<[[STEPS]]>
1150; CHECK-NEXT:     vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.ptr>
1151; CHECK-NEXT:     WIDEN ir<%for.1.next> = load vp<[[VEC_PTR]]>
1152; CHECK-NEXT:     EMIT vp<[[FOR1_SPLICE:%.+]]> = first-order splice ir<%for.1>, ir<%for.1.next>
1153; CHECK-NEXT:     WIDEN ir<%add> = add vp<[[FOR1_SPLICE]]>, ir<1>
1154; CHECK-NEXT:     vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%gep.ptr>
1155; CHECK-NEXT:     WIDEN store vp<[[VEC_PTR2]]>, ir<%add>
1156; CHECK-NEXT:     EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
1157; CHECK-NEXT:     EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
1158; CHECK-NEXT:   No successors
1159; CHECK-NEXT: }
1160; CHECK-NEXT: Successor(s): middle.block
1161; CHECK-EMPTY:
1162; CHECK-NEXT: middle.block:
1163; CHECK-NEXT:   EMIT vp<[[FOR_RESULT:%.+]]> = extract-from-end ir<%for.1.next>, ir<2>
1164; CHECK-NEXT:   EMIT vp<[[RESUME_1:%.+]]> = extract-from-end ir<%for.1.next>, ir<1>
1165; CHECK-NEXT:   EMIT vp<[[CMP:%.+]]> = icmp eq ir<1000>, vp<[[VTC]]>
1166; CHECK-NEXT:   EMIT branch-on-cond vp<[[CMP]]>
1167; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
1168; CHECK-EMPTY:
1169; CHECK-NEXT: scalar.ph
1170; CHECK-NEXT:   EMIT vp<[[RESUME_P:%.*]]> = resume-phi vp<[[RESUME_1]]>, ir<22>
1171; CHECK-NEXT:   EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
1172; CHECK-NEXT:  Successor(s): ir-bb<loop>
1173; CHECK-EMPTY:
1174; CHECK-NEXT:  ir-bb<loop>:
1175; CHECK-NEXT:    IR   %for.1 = phi i16 [ 22, %entry ], [ %for.1.next, %loop ] (extra operand: vp<[[RESUME_P]]> from scalar.ph)
1176; CHECK-NEXT:    IR   %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph)
1177; CHECK:         IR   %exitcond.not = icmp eq i64 %iv.next, 1000
1178; CHECK-NEXT: No successors
1179; CHECK-EMPTY:
1180; CHECK-NEXT: ir-bb<exit>
1181; CHECK-NEXT:   IR %for.1.lcssa = phi i16 [ %for.1, %loop ] (extra operand: vp<[[FOR_RESULT]]> from middle.block)
1182; CHECK-NEXT: No successors
1183; CHECK-NEXT: }
1184;
1185entry:
1186  br label %loop
1187
1188loop:
1189  %for.1 = phi i16 [ 22, %entry ], [ %for.1.next, %loop ]
1190  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
1191  %iv.next = add nuw nsw i64 %iv, 1
1192  %gep.ptr = getelementptr inbounds i16, ptr %ptr, i64 %iv
1193  %for.1.next = load i16, ptr %gep.ptr, align 2
1194  %add = add i16 %for.1, 1
1195  store i16 %add, ptr %gep.ptr
1196  %exitcond.not = icmp eq i64 %iv.next, 1000
1197  br i1 %exitcond.not, label %exit, label %loop
1198
1199exit:
1200  ret i16 %for.1
1201}
1202
1203define void @print_select_with_fastmath_flags(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
1204; CHECK-LABEL: 'print_select_with_fastmath_flags'
1205; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1'
1206; CHECK-NEXT: Live-in vp<[[VFUF:%.+]]> = VF * UF
1207; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
1208; CHECK-NEXT: Live-in ir<%N> = original trip-count
1209; CHECK-EMPTY:
1210; CHECK-NEXT: ir-bb<entry>:
1211; CHECK-NEXT: Successor(s): vector.ph
1212; CHECK-EMPTY:
1213; CHECK-NEXT: vector.ph:
1214; CHECK-NEXT: Successor(s): vector loop
1215; CHECK-EMPTY:
1216; CHECK: <x1> vector loop: {
1217; CHECK-NEXT:   vector.body:
1218; CHECK-NEXT:     EMIT vp<[[IV:%.+]]> =  CANONICAL-INDUCTION ir<0>, vp<[[IV_NEXT_EXIT:%.+]]>
1219; CHECK-NEXT:     vp<[[ST:%.+]]> = SCALAR-STEPS vp<[[IV]]>, ir<1>
1220; CHECK-NEXT:     CLONE ir<[[GEP1:%.+]]> = getelementptr inbounds nuw ir<%b>, vp<[[ST]]>
1221; CHECK-NEXT:     vp<[[PTR1:%.+]]> = vector-pointer ir<[[GEP1]]>
1222; CHECK-NEXT:     WIDEN ir<[[LD1:%.+]]> = load vp<[[PTR1]]>
1223; CHECK-NEXT:     CLONE ir<[[GEP2:%.+]]> = getelementptr inbounds nuw ir<%c>, vp<[[ST]]>
1224; CHECK-NEXT:     vp<[[PTR2:%.+]]> = vector-pointer ir<[[GEP2]]>
1225; CHECK-NEXT:     WIDEN ir<[[LD2:%.+]]> = load vp<[[PTR2]]>
1226; CHECK-NEXT:     WIDEN ir<[[FCMP:%.+]]> = fcmp ogt ir<[[LD1]]>, ir<[[LD2]]>
1227; CHECK-NEXT:     WIDEN ir<[[FADD:%.+]]> = fadd reassoc nnan ninf nsz arcp contract afn ir<[[LD1]]>, ir<1.000000e+01>
1228; CHECK-NEXT:     WIDEN-SELECT ir<[[SELECT:%.+]]> = select reassoc nnan ninf nsz arcp contract afn ir<[[FCMP]]>, ir<[[FADD]]>, ir<[[LD2]]>
1229; CHECK-NEXT:     CLONE ir<[[GEP3:%.+]]> = getelementptr inbounds nuw ir<%a>, vp<[[ST]]>
1230; CHECK-NEXT:     vp<[[PTR3:%.+]]> = vector-pointer ir<[[GEP3]]>
1231; CHECK-NEXT:     WIDEN store vp<[[PTR3]]>, ir<[[SELECT]]>
1232; CHECK-NEXT:     EMIT vp<[[IV_NEXT_EXIT]]> = add nuw vp<[[IV]]>, vp<[[VFUF]]>
1233; CHECK-NEXT:     EMIT branch-on-count vp<[[IV_NEXT_EXIT]]>, vp<[[VTC]]>
1234; CHECK-NEXT:   No successors
1235; CHECK-NEXT: }
1236
1237entry:
1238  br label %for.body
1239
1240for.body:
1241  %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
1242  %gep = getelementptr inbounds nuw float, ptr %b, i64 %iv
1243  %0 = load float, ptr %gep, align 4
1244  %gep3 = getelementptr inbounds nuw float, ptr %c, i64 %iv
1245  %1 = load float, ptr %gep3, align 4
1246  %cmp4 = fcmp fast ogt float %0, %1
1247  %add = fadd fast float %0, 1.000000e+01
1248  %cond = select fast i1 %cmp4, float %add, float %1
1249  %gep11 = getelementptr inbounds nuw float, ptr %a, i64 %iv
1250  store float %cond, ptr %gep11, align 4
1251  %iv.next = add nuw nsw i64 %iv, 1
1252  %exitcond.not = icmp eq i64 %iv.next, %N
1253  br i1 %exitcond.not, label %exit, label %for.body
1254
1255exit:
1256  ret void
1257}
1258
1259!llvm.dbg.cu = !{!0}
1260!llvm.module.flags = !{!3, !4}
1261
1262declare float @foo(float) #0
1263declare <2 x float> @vector_foo(<2 x float>, <2 x i1>)
1264
1265; We need a vector variant in order to allow for vectorization at present, but
1266; we want to test scalarization of conditional calls. If we provide a variant
1267; with a different number of lanes than the VF we force via
1268; "-force-vector-width=4", then it should pass the legality checks but
1269; scalarize. TODO: Remove the requirement to have a variant.
1270attributes #0 = { readonly nounwind "vector-function-abi-variant"="_ZGV_LLVM_M2v_foo(vector_foo)" }
1271
1272!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: NoDebug, enums: !2)
1273!1 = !DIFile(filename: "/tmp/s.c", directory: "/tmp")
1274!2 = !{}
1275!3 = !{i32 2, !"Debug Info Version", i32 3}
1276!4 = !{i32 7, !"PIC Level", i32 2}
1277!5 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 4, type: !6, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2)
1278!6 = !DISubroutineType(types: !2)
1279!7 = !DILocation(line: 5, column: 3, scope: !5)
1280!8 = !DILocation(line: 5, column: 21, scope: !5)
1281