1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -force-vector-width=4 -force-vector-interleave=1 -passes=loop-vectorize -S %s | FileCheck %s 3 4target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 5 6define i32 @test(i64 %N, i32 %x) { 7; CHECK-LABEL: @test( 8; CHECK-NEXT: entry: 9; CHECK-NEXT: [[EXTRA_ITER:%.*]] = and i64 [[N:%.*]], 7 10; CHECK-NEXT: br label [[CHECK:%.*]] 11; CHECK: check: 12; CHECK-NEXT: [[EXTRA_ITER_CHECK:%.*]] = icmp eq i64 [[EXTRA_ITER]], 0 13; CHECK-NEXT: br i1 [[EXTRA_ITER_CHECK]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]] 14; CHECK: loop.preheader: 15; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 16; CHECK: vector.ph: 17; CHECK-NEXT: [[N_RND_UP:%.*]] = add i64 [[EXTRA_ITER]], 3 18; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], 4 19; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]] 20; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[EXTRA_ITER]], 1 21; CHECK-NEXT: [[IND_END:%.*]] = sub i64 [[EXTRA_ITER]], [[N_VEC]] 22; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0 23; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer 24; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 25; CHECK: vector.body: 26; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 27; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP2:%.*]], [[VECTOR_BODY]] ] 28; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i64 0 29; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT1]], <4 x i64> poison, <4 x i32> zeroinitializer 30; CHECK-NEXT: [[VEC_IV:%.*]] = add <4 x i64> [[BROADCAST_SPLAT2]], <i64 0, i64 1, i64 2, i64 3> 31; CHECK-NEXT: [[TMP0:%.*]] = icmp ule <4 x i64> [[VEC_IV]], [[BROADCAST_SPLAT]] 32; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[VEC_PHI]], splat (i32 10) 33; CHECK-NEXT: [[TMP2]] = select <4 x i1> [[TMP1]], <4 x i32> [[VEC_PHI]], <4 x i32> splat (i32 10) 34; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[TMP2]], <4 x i32> [[VEC_PHI]] 35; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 36; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 37; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 38; CHECK: middle.block: 39; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.smax.v4i32(<4 x i32> [[TMP3]]) 40; CHECK-NEXT: br i1 true, label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 41; CHECK: scalar.ph: 42; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP5]], [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 43; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[EXTRA_ITER]], [[LOOP_PREHEADER]] ] 44; CHECK-NEXT: br label [[LOOP:%.*]] 45; CHECK: loop: 46; CHECK-NEXT: [[NEXT:%.*]] = phi i32 [ [[SEL:%.*]], [[LOOP]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 47; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 48; CHECK-NEXT: [[SEL_COND:%.*]] = icmp sgt i32 [[NEXT]], 10 49; CHECK-NEXT: [[SEL]] = select i1 [[SEL_COND]], i32 [[NEXT]], i32 10 50; CHECK-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], -1 51; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 0 52; CHECK-NEXT: br i1 [[EC]], label [[EXIT_LOOPEXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]] 53; CHECK: exit.loopexit: 54; CHECK-NEXT: [[SEL_LCSSA:%.*]] = phi i32 [ [[SEL]], [[LOOP]] ], [ [[TMP5]], [[MIDDLE_BLOCK]] ] 55; CHECK-NEXT: br label [[EXIT]] 56; CHECK: exit: 57; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[CHECK]] ], [ [[SEL_LCSSA]], [[EXIT_LOOPEXIT]] ] 58; CHECK-NEXT: ret i32 [[RESULT]] 59; 60entry: 61 %extra.iter = and i64 %N, 7 62 br label %check 63 64check: 65 %extra.iter.check = icmp eq i64 %extra.iter, 0 66 br i1 %extra.iter.check, label %exit, label %loop 67 68loop: 69 %next = phi i32 [ %sel, %loop ], [ 0, %check ] 70 %iv = phi i64 [ %iv.next, %loop ], [ %extra.iter, %check ] 71 %sel.cond = icmp sgt i32 %next, 10 72 %sel = select i1 %sel.cond, i32 %next, i32 10 73 %iv.next = add nsw i64 %iv, -1 74 %ec = icmp eq i64 %iv.next, 0 75 br i1 %ec, label %exit, label %loop 76 77exit: 78 %result = phi i32 [ %sel, %loop], [ 0, %check ] 79 ret i32 %result 80} 81 82define i32 @pr66895_tail_fold_reduction_exit_inst_gets_simplified(i32 %n) { 83; CHECK-LABEL: @pr66895_tail_fold_reduction_exit_inst_gets_simplified( 84; CHECK-NEXT: entry: 85; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 86; CHECK: vector.ph: 87; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 88; CHECK: vector.body: 89; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 90; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 1, i32 1>, [[VECTOR_PH]] ], [ [[VEC_PHI]], [[VECTOR_BODY]] ] 91; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[INDEX]], i64 0 92; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer 93; CHECK-NEXT: [[VEC_IV:%.*]] = add <4 x i32> [[BROADCAST_SPLAT]], <i32 0, i32 1, i32 2, i32 3> 94; CHECK-NEXT: [[TMP0:%.*]] = icmp ule <4 x i32> [[VEC_IV]], splat (i32 12) 95; CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[VEC_PHI]], <4 x i32> [[VEC_PHI]] 96; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 97; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[INDEX_NEXT]], 16 98; CHECK-NEXT: br i1 [[TMP2]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 99; CHECK: middle.block: 100; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[TMP1]]) 101; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 102; CHECK: scalar.ph: 103; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ -4, [[MIDDLE_BLOCK]] ], [ 12, [[ENTRY:%.*]] ] 104; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP3]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 105; CHECK-NEXT: br label [[LOOP:%.*]] 106; CHECK: loop: 107; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 108; CHECK-NEXT: [[RED:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[RED_NEXT:%.*]], [[LOOP]] ] 109; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], -1 110; CHECK-NEXT: [[RED_NEXT]] = mul i32 [[RED]], 1 111; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV]], 0 112; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]] 113; CHECK: exit: 114; CHECK-NEXT: [[RED_LCSSA:%.*]] = phi i32 [ [[RED_NEXT]], [[LOOP]] ], [ [[TMP3]], [[MIDDLE_BLOCK]] ] 115; CHECK-NEXT: ret i32 [[RED_LCSSA]] 116; 117entry: 118 br label %loop 119 120loop: 121 %iv = phi i32 [ 12, %entry ], [ %iv.next, %loop ] 122 %red = phi i32 [ 0, %entry ], [ %red.next, %loop ] 123 %iv.next = add i32 %iv, -1 124 %red.next = mul i32 %red, 1 125 %ec = icmp eq i32 %iv, 0 126 br i1 %ec, label %exit, label %loop 127 128exit: 129 %red.lcssa = phi i32 [ %red.next, %loop ] 130 ret i32 %red.lcssa 131} 132