xref: /llvm-project/llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll (revision 1de3dc7d23dd6b856efad3a3a04f2396328726d7) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
2; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -lv-strided-pointer-ivs=true -S %s | FileCheck %s
3
4define void @step_direction_unknown(i32 %arg, ptr %dst) {
5; CHECK-LABEL: define void @step_direction_unknown
6; CHECK-SAME: (i32 [[ARG:%.*]], ptr [[DST:%.*]]) {
7; CHECK-NEXT:  entry:
8; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[ARG]], 1
9; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
10; CHECK:       vector.scevcheck:
11; CHECK-NEXT:    [[TMP0:%.*]] = sub i32 -1, [[ARG]]
12; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 [[ADD]], 0
13; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 [[ADD]]
14; CHECK-NEXT:    [[MUL1:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[TMP2]], i32 1023)
15; CHECK-NEXT:    [[MUL_RESULT:%.*]] = extractvalue { i32, i1 } [[MUL1]], 0
16; CHECK-NEXT:    [[MUL_OVERFLOW:%.*]] = extractvalue { i32, i1 } [[MUL1]], 1
17; CHECK-NEXT:    [[TMP3:%.*]] = sub i32 0, [[MUL_RESULT]]
18; CHECK-NEXT:    [[TMP4:%.*]] = icmp ugt i32 [[TMP3]], 0
19; CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[TMP1]], i1 [[TMP4]], i1 false
20; CHECK-NEXT:    [[TMP6:%.*]] = or i1 [[TMP5]], [[MUL_OVERFLOW]]
21; CHECK-NEXT:    [[TMP7:%.*]] = icmp ne i32 [[ADD]], 0
22; CHECK-NEXT:    br i1 [[TMP6]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
23; CHECK:       vector.ph:
24; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[ADD]], i64 0
25; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer
26; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
27; CHECK:       vector.body:
28; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
29; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
30; CHECK-NEXT:    [[TMP8:%.*]] = mul <4 x i32> [[BROADCAST_SPLAT]], [[VEC_IND]]
31; CHECK-NEXT:    [[TMP9:%.*]] = zext <4 x i32> [[TMP8]] to <4 x i64>
32; CHECK-NEXT:    [[TMP10:%.*]] = extractelement <4 x i64> [[TMP9]], i32 0
33; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP10]]
34; CHECK-NEXT:    [[TMP12:%.*]] = extractelement <4 x i64> [[TMP9]], i32 1
35; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP12]]
36; CHECK-NEXT:    [[TMP14:%.*]] = extractelement <4 x i64> [[TMP9]], i32 2
37; CHECK-NEXT:    [[TMP15:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP14]]
38; CHECK-NEXT:    [[TMP16:%.*]] = extractelement <4 x i64> [[TMP9]], i32 3
39; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr double, ptr [[DST]], i64 [[TMP16]]
40; CHECK-NEXT:    store double 0.000000e+00, ptr [[TMP11]], align 8
41; CHECK-NEXT:    store double 0.000000e+00, ptr [[TMP13]], align 8
42; CHECK-NEXT:    store double 0.000000e+00, ptr [[TMP15]], align 8
43; CHECK-NEXT:    store double 0.000000e+00, ptr [[TMP17]], align 8
44; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
45; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
46; CHECK-NEXT:    [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
47; CHECK-NEXT:    br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
48; CHECK:       middle.block:
49; CHECK-NEXT:    br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]
50; CHECK:       scalar.ph:
51; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ 1024, [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[ENTRY:%.*]] ]
52; CHECK-NEXT:    br label [[LOOP:%.*]]
53; CHECK:       loop:
54; CHECK-NEXT:    [[PHI:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[ADD2:%.*]], [[LOOP]] ]
55; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i64 [[PHI]] to i32
56; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[ADD]], [[TRUNC]]
57; CHECK-NEXT:    [[ZEXT:%.*]] = zext i32 [[MUL]] to i64
58; CHECK-NEXT:    [[GETELEMENTPTR:%.*]] = getelementptr double, ptr [[DST]], i64 [[ZEXT]]
59; CHECK-NEXT:    store double 0.000000e+00, ptr [[GETELEMENTPTR]], align 8
60; CHECK-NEXT:    [[ADD2]] = add i64 [[PHI]], 1
61; CHECK-NEXT:    [[ICMP:%.*]] = icmp eq i64 [[ADD2]], 1024
62; CHECK-NEXT:    br i1 [[ICMP]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
63; CHECK:       exit:
64; CHECK-NEXT:    ret void
65;
66entry:
67  %add = add i32 %arg, 1
68  br label %loop
69
70loop:
71  %phi = phi i64 [ 0, %entry ], [ %add2, %loop ]
72  %trunc = trunc i64 %phi to i32
73  %mul = mul i32 %add, %trunc
74  %zext = zext i32 %mul to i64
75  %getelementptr = getelementptr double, ptr %dst, i64 %zext
76  store double 0.000000e+00, ptr %getelementptr, align 8
77  %add2 = add i64 %phi, 1
78  %icmp = icmp eq i64 %add2, 1024
79  br i1 %icmp, label %exit, label %loop
80
81exit:
82  ret void
83}
84
85define void @integer_induction_wraps_scev_predicate_known(i32 %x, ptr %call, ptr %start) {
86; CHECK-LABEL: define void @integer_induction_wraps_scev_predicate_known
87; CHECK-SAME: (i32 [[X:%.*]], ptr [[CALL:%.*]], ptr [[START:%.*]]) {
88; CHECK-NEXT:  entry:
89; CHECK-NEXT:    [[MUL:%.*]] = shl i32 [[X]], 1
90; CHECK-NEXT:    [[TMP0:%.*]] = sext i32 [[MUL]] to i64
91; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
92; CHECK:       vector.ph:
93; CHECK-NEXT:    [[TMP1:%.*]] = mul i64 992, [[TMP0]]
94; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[START]], i64 [[TMP1]]
95; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
96; CHECK:       vector.body:
97; CHECK-NEXT:    [[POINTER_PHI:%.*]] = phi ptr [ [[START]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ]
98; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
99; CHECK-NEXT:    [[TMP3:%.*]] = mul i64 [[TMP0]], 4
100; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TMP0]], i64 0
101; CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <4 x i64> [[DOTSPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
102; CHECK-NEXT:    [[TMP4:%.*]] = mul <4 x i64> <i64 0, i64 1, i64 2, i64 3>, [[DOTSPLAT]]
103; CHECK-NEXT:    [[VECTOR_GEP:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i64> [[TMP4]]
104; CHECK-NEXT:    [[DOTCAST:%.*]] = trunc i64 [[INDEX]] to i32
105; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = add i32 30, [[DOTCAST]]
106; CHECK-NEXT:    [[TMP5:%.*]] = add i32 [[OFFSET_IDX]], 0
107; CHECK-NEXT:    [[TMP6:%.*]] = getelementptr ptr, ptr [[CALL]], i32 [[TMP5]]
108; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr ptr, ptr [[TMP6]], i32 0
109; CHECK-NEXT:    store <4 x ptr> [[VECTOR_GEP]], ptr [[TMP7]], align 4
110; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
111; CHECK-NEXT:    [[PTR_IND]] = getelementptr i8, ptr [[POINTER_PHI]], i64 [[TMP3]]
112; CHECK-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 992
113; CHECK-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
114; CHECK:       middle.block:
115; CHECK-NEXT:    br i1 false, label [[FOR_END:%.*]], label [[SCALAR_PH]]
116; CHECK:       scalar.ph:
117; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ 1022, [[MIDDLE_BLOCK]] ], [ 30, [[ENTRY:%.*]] ]
118; CHECK-NEXT:    [[BC_RESUME_VAL1:%.*]] = phi ptr [ [[TMP2]], [[MIDDLE_BLOCK]] ], [ [[START]], [[ENTRY]] ]
119; CHECK-NEXT:    br label [[FOR_COND:%.*]]
120; CHECK:       for.cond:
121; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INC:%.*]], [[FOR_COND]] ]
122; CHECK-NEXT:    [[P_0:%.*]] = phi ptr [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ], [ [[ADD_PTR:%.*]], [[FOR_COND]] ]
123; CHECK-NEXT:    [[ADD_PTR]] = getelementptr i8, ptr [[P_0]], i32 [[MUL]]
124; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr ptr, ptr [[CALL]], i32 [[IV]]
125; CHECK-NEXT:    store ptr [[P_0]], ptr [[ARRAYIDX]], align 4
126; CHECK-NEXT:    [[INC]] = add i32 [[IV]], 1
127; CHECK-NEXT:    [[TOBOOL_NOT:%.*]] = icmp eq i32 [[IV]], 1024
128; CHECK-NEXT:    br i1 [[TOBOOL_NOT]], label [[FOR_END]], label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
129; CHECK:       for.end:
130; CHECK-NEXT:    ret void
131;
132entry:
133  %mul = shl i32 %x, 1
134  br label %for.cond
135
136for.cond:                                         ; preds = %for.body, %entry
137  %iv = phi i32 [ 30, %entry ], [ %inc, %for.cond ]
138  %p.0 = phi ptr [ %start, %entry ], [ %add.ptr, %for.cond ]
139  %add.ptr = getelementptr i8, ptr %p.0, i32 %mul
140  %arrayidx = getelementptr ptr, ptr %call, i32 %iv
141  store ptr %p.0, ptr %arrayidx, align 4
142  %inc = add i32 %iv, 1
143  %tobool.not = icmp eq i32 %iv, 1024
144  br i1 %tobool.not, label %for.end, label %for.cond
145
146for.end:                                          ; preds = %for.cond
147  ret void
148}
149
150@h = global i64 0
151
152define void @implied_wrap_predicate(ptr %A, ptr %B, ptr %C) {
153; CHECK-LABEL: define void @implied_wrap_predicate
154; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
155; CHECK-NEXT:  entry:
156; CHECK-NEXT:    [[A3:%.*]] = ptrtoint ptr [[A]] to i64
157; CHECK-NEXT:    [[C2:%.*]] = ptrtoint ptr [[C]] to i64
158; CHECK-NEXT:    [[A1:%.*]] = ptrtoint ptr [[A]] to i64
159; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[A3]], 16
160; CHECK-NEXT:    [[UMAX4:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP0]], i64 add (i64 ptrtoint (ptr @h to i64), i64 1))
161; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[UMAX4]], -9
162; CHECK-NEXT:    [[TMP2:%.*]] = sub i64 [[TMP1]], [[A3]]
163; CHECK-NEXT:    [[TMP3:%.*]] = lshr i64 [[TMP2]], 3
164; CHECK-NEXT:    [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1
165; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP4]], 4
166; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
167; CHECK:       vector.scevcheck:
168; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[A1]], 16
169; CHECK-NEXT:    [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP5]], i64 add (i64 ptrtoint (ptr @h to i64), i64 1))
170; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[UMAX]], -9
171; CHECK-NEXT:    [[TMP7:%.*]] = sub i64 [[TMP6]], [[A1]]
172; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 3
173; CHECK-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP8]] to i16
174; CHECK-NEXT:    [[TMP10:%.*]] = add i16 2, [[TMP9]]
175; CHECK-NEXT:    [[TMP11:%.*]] = icmp ult i16 [[TMP10]], 2
176; CHECK-NEXT:    [[TMP12:%.*]] = icmp ugt i64 [[TMP8]], 65535
177; CHECK-NEXT:    [[TMP13:%.*]] = or i1 [[TMP11]], [[TMP12]]
178; CHECK-NEXT:    br i1 [[TMP13]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]
179; CHECK:       vector.memcheck:
180; CHECK-NEXT:    [[TMP14:%.*]] = sub i64 [[C2]], [[A3]]
181; CHECK-NEXT:    [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP14]], 32
182; CHECK-NEXT:    br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
183; CHECK:       vector.ph:
184; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[TMP4]], 4
185; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[TMP4]], [[N_MOD_VF]]
186; CHECK-NEXT:    [[DOTCAST:%.*]] = trunc i64 [[N_VEC]] to i16
187; CHECK-NEXT:    [[IND_END:%.*]] = add i16 1, [[DOTCAST]]
188; CHECK-NEXT:    [[IND_END5:%.*]] = add i64 1, [[N_VEC]]
189; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
190; CHECK:       vector.body:
191; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
192; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
193; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 0
194; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr i64, ptr [[A]], i64 [[TMP15]]
195; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr i64, ptr [[TMP16]], i32 0
196; CHECK-NEXT:    store <4 x i64> zeroinitializer, ptr [[TMP17]], align 4
197; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr i64, ptr [[C]], i64 [[TMP15]]
198; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr i64, ptr [[TMP18]], i32 0
199; CHECK-NEXT:    store <4 x i64> zeroinitializer, ptr [[TMP19]], align 4
200; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
201; CHECK-NEXT:    [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
202; CHECK-NEXT:    br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
203; CHECK:       middle.block:
204; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]]
205; CHECK-NEXT:    br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
206; CHECK:       scalar.ph:
207; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i16 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 1, [[VECTOR_MEMCHECK]] ], [ 1, [[VECTOR_SCEVCHECK]] ], [ 1, [[ENTRY:%.*]] ]
208; CHECK-NEXT:    [[BC_RESUME_VAL6:%.*]] = phi i64 [ [[IND_END5]], [[MIDDLE_BLOCK]] ], [ 1, [[VECTOR_MEMCHECK]] ], [ 1, [[VECTOR_SCEVCHECK]] ], [ 1, [[ENTRY]] ]
209; CHECK-NEXT:    br label [[LOOP:%.*]]
210; CHECK:       loop:
211; CHECK-NEXT:    [[IV:%.*]] = phi i16 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
212; CHECK-NEXT:    [[IV_EXT:%.*]] = phi i64 [ [[BC_RESUME_VAL6]], [[SCALAR_PH]] ], [ [[IV_EXT_NEXT:%.*]], [[LOOP]] ]
213; CHECK-NEXT:    [[GEP_A:%.*]] = getelementptr i64, ptr [[A]], i64 [[IV_EXT]]
214; CHECK-NEXT:    store i64 0, ptr [[GEP_A]], align 4
215; CHECK-NEXT:    [[GEP_C:%.*]] = getelementptr i64, ptr [[C]], i64 [[IV_EXT]]
216; CHECK-NEXT:    store i64 0, ptr [[GEP_C]], align 4
217; CHECK-NEXT:    [[IV_NEXT]] = add i16 [[IV]], 1
218; CHECK-NEXT:    [[IV_EXT_NEXT]] = zext i16 [[IV_NEXT]] to i64
219; CHECK-NEXT:    [[GEP:%.*]] = getelementptr i64, ptr [[A]], i64 [[IV_EXT_NEXT]]
220; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt ptr [[GEP]], @h
221; CHECK-NEXT:    br i1 [[CMP]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP7:![0-9]+]]
222; CHECK:       exit:
223; CHECK-NEXT:    ret void
224;
225entry:
226  br label %loop
227
228loop:
229  %iv = phi i16 [ 1, %entry ], [ %iv.next, %loop ]
230  %iv.ext = phi i64 [ 1, %entry ], [ %iv.ext.next, %loop ]
231  %gep.A = getelementptr i64, ptr %A, i64 %iv.ext
232  store i64 0, ptr %gep.A
233  %gep.C = getelementptr i64, ptr %C, i64 %iv.ext
234  store i64 0, ptr %gep.C
235  %iv.next = add i16 %iv, 1
236  %iv.ext.next = zext i16 %iv.next to i64
237  %gep = getelementptr i64, ptr %A, i64 %iv.ext.next
238  %cmp = icmp ugt ptr %gep, @h
239  br i1 %cmp, label %exit, label %loop
240
241exit:
242  ret void
243}
244