1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -force-vector-width=4 -force-vector-interleave=1 -passes=loop-vectorize -S | FileCheck %s 3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 5 6define i8 @PR34687(i1 %c, i32 %x, i32 %n) { 7; CHECK-LABEL: @PR34687( 8; CHECK-NEXT: entry: 9; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 4 10; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 11; CHECK: vector.ph: 12; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 4 13; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]] 14; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i32> poison, i32 [[X:%.*]], i64 0 15; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT1]], <4 x i32> poison, <4 x i32> zeroinitializer 16; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 17; CHECK: vector.body: 18; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 19; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] 20; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i32> [[VEC_PHI]], splat (i32 255) 21; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i32> [[TMP1]], [[BROADCAST_SPLAT2]] 22; CHECK-NEXT: [[TMP3:%.*]] = trunc <4 x i32> [[TMP2]] to <4 x i8> 23; CHECK-NEXT: [[TMP4]] = zext <4 x i8> [[TMP3]] to <4 x i32> 24; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 25; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 26; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 27; CHECK: middle.block: 28; CHECK-NEXT: [[TMP6:%.*]] = trunc <4 x i32> [[TMP4]] to <4 x i8> 29; CHECK-NEXT: [[TMP7:%.*]] = call i8 @llvm.vector.reduce.add.v4i8(<4 x i8> [[TMP6]]) 30; CHECK-NEXT: [[TMP8:%.*]] = zext i8 [[TMP7]] to i32 31; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]] 32; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] 33; CHECK: scalar.ph: 34; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 35; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP8]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 36; CHECK-NEXT: br label [[FOR_BODY:%.*]] 37; CHECK: for.body: 38; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[IF_END:%.*]] ] 39; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[R_NEXT:%.*]], [[IF_END]] ] 40; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_END]] 41; CHECK: if.then: 42; CHECK-NEXT: [[T0:%.*]] = sdiv i32 undef, undef 43; CHECK-NEXT: br label [[IF_END]] 44; CHECK: if.end: 45; CHECK-NEXT: [[T1:%.*]] = and i32 [[R]], 255 46; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1 47; CHECK-NEXT: [[R_NEXT]] = add nuw nsw i32 [[T1]], [[X]] 48; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] 49; CHECK-NEXT: br i1 [[COND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 50; CHECK: for.end: 51; CHECK-NEXT: [[T2:%.*]] = phi i32 [ [[R_NEXT]], [[IF_END]] ], [ [[TMP8]], [[MIDDLE_BLOCK]] ] 52; CHECK-NEXT: [[T3:%.*]] = trunc i32 [[T2]] to i8 53; CHECK-NEXT: ret i8 [[T3]] 54; 55entry: 56 br label %for.body 57 58for.body: 59 %i = phi i32 [ 0, %entry ], [ %i.next, %if.end ] 60 %r = phi i32 [ 0, %entry ], [ %r.next, %if.end ] 61 br i1 %c, label %if.then, label %if.end 62 63if.then: 64 %t0 = sdiv i32 undef, undef 65 br label %if.end 66 67if.end: 68 %t1 = and i32 %r, 255 69 %i.next = add nsw i32 %i, 1 70 %r.next = add nuw nsw i32 %t1, %x 71 %cond = icmp eq i32 %i.next, %n 72 br i1 %cond, label %for.end, label %for.body 73 74for.end: 75 %t2 = phi i32 [ %r.next, %if.end ] 76 %t3 = trunc i32 %t2 to i8 77 ret i8 %t3 78} 79 80define i8 @PR34687_no_undef(i1 %c, i32 %x, i32 %n) { 81; CHECK-LABEL: @PR34687_no_undef( 82; CHECK-NEXT: entry: 83; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 4 84; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 85; CHECK: vector.ph: 86; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 4 87; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]] 88; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C:%.*]], i64 0 89; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer 90; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i32> poison, i32 [[X:%.*]], i64 0 91; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT1]], <4 x i32> poison, <4 x i32> zeroinitializer 92; CHECK-NEXT: [[TMP0:%.*]] = select <4 x i1> [[BROADCAST_SPLAT]], <4 x i32> [[BROADCAST_SPLAT2]], <4 x i32> splat (i32 1) 93; CHECK-NEXT: [[TMP1:%.*]] = sdiv <4 x i32> splat (i32 99), [[TMP0]] 94; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[BROADCAST_SPLAT]], <4 x i32> [[TMP1]], <4 x i32> zeroinitializer 95; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 96; CHECK: vector.body: 97; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 98; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ] 99; CHECK-NEXT: [[TMP3:%.*]] = and <4 x i32> [[VEC_PHI]], splat (i32 255) 100; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i32> [[TMP3]], [[PREDPHI]] 101; CHECK-NEXT: [[TMP5:%.*]] = trunc <4 x i32> [[TMP4]] to <4 x i8> 102; CHECK-NEXT: [[TMP6]] = zext <4 x i8> [[TMP5]] to <4 x i32> 103; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 104; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 105; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 106; CHECK: middle.block: 107; CHECK-NEXT: [[TMP8:%.*]] = trunc <4 x i32> [[TMP6]] to <4 x i8> 108; CHECK-NEXT: [[TMP9:%.*]] = call i8 @llvm.vector.reduce.add.v4i8(<4 x i8> [[TMP8]]) 109; CHECK-NEXT: [[TMP10:%.*]] = zext i8 [[TMP9]] to i32 110; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]] 111; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] 112; CHECK: scalar.ph: 113; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 114; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP10]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 115; CHECK-NEXT: br label [[FOR_BODY:%.*]] 116; CHECK: for.body: 117; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[IF_END:%.*]] ] 118; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[R_NEXT:%.*]], [[IF_END]] ] 119; CHECK-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[IF_END]] 120; CHECK: if.then: 121; CHECK-NEXT: [[T0:%.*]] = sdiv i32 99, [[X]] 122; CHECK-NEXT: br label [[IF_END]] 123; CHECK: if.end: 124; CHECK-NEXT: [[P:%.*]] = phi i32 [ 0, [[FOR_BODY]] ], [ [[T0]], [[IF_THEN]] ] 125; CHECK-NEXT: [[T1:%.*]] = and i32 [[R]], 255 126; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1 127; CHECK-NEXT: [[R_NEXT]] = add nuw nsw i32 [[T1]], [[P]] 128; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] 129; CHECK-NEXT: br i1 [[COND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] 130; CHECK: for.end: 131; CHECK-NEXT: [[T2:%.*]] = phi i32 [ [[R_NEXT]], [[IF_END]] ], [ [[TMP10]], [[MIDDLE_BLOCK]] ] 132; CHECK-NEXT: [[T3:%.*]] = trunc i32 [[T2]] to i8 133; CHECK-NEXT: ret i8 [[T3]] 134; 135entry: 136 br label %for.body 137 138for.body: 139 %i = phi i32 [ 0, %entry ], [ %i.next, %if.end ] 140 %r = phi i32 [ 0, %entry ], [ %r.next, %if.end ] 141 br i1 %c, label %if.then, label %if.end 142 143if.then: 144 %t0 = sdiv i32 99, %x 145 br label %if.end 146 147if.end: 148 %p = phi i32 [ 0, %for.body ], [ %t0, %if.then ] 149 %t1 = and i32 %r, 255 150 %i.next = add nsw i32 %i, 1 151 %r.next = add nuw nsw i32 %t1, %p 152 %cond = icmp eq i32 %i.next, %n 153 br i1 %cond, label %for.end, label %for.body 154 155for.end: 156 %t2 = phi i32 [ %r.next, %if.end ] 157 %t3 = trunc i32 %t2 to i8 158 ret i8 %t3 159} 160 161define i32 @PR35734(i32 %x, i32 %y) { 162; CHECK-LABEL: @PR35734( 163; CHECK-NEXT: entry: 164; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 78) 165; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SMAX]], 1 166; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[X]] 167; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP1]], 4 168; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 169; CHECK: vector.ph: 170; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP1]], 4 171; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP1]], [[N_MOD_VF]] 172; CHECK-NEXT: [[IND_END:%.*]] = add i32 [[X]], [[N_VEC]] 173; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[Y:%.*]], i32 0 174; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 175; CHECK: vector.body: 176; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 177; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ [[TMP2]], [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ] 178; CHECK-NEXT: [[TMP3:%.*]] = and <4 x i32> [[VEC_PHI]], splat (i32 1) 179; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i32> [[TMP3]], splat (i32 -1) 180; CHECK-NEXT: [[TMP5:%.*]] = trunc <4 x i32> [[TMP4]] to <4 x i1> 181; CHECK-NEXT: [[TMP6]] = sext <4 x i1> [[TMP5]] to <4 x i32> 182; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 183; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 184; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] 185; CHECK: middle.block: 186; CHECK-NEXT: [[TMP8:%.*]] = trunc <4 x i32> [[TMP6]] to <4 x i1> 187; CHECK-NEXT: [[TMP9:%.*]] = call i1 @llvm.vector.reduce.add.v4i1(<4 x i1> [[TMP8]]) 188; CHECK-NEXT: [[TMP10:%.*]] = sext i1 [[TMP9]] to i32 189; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP1]], [[N_VEC]] 190; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] 191; CHECK: scalar.ph: 192; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[X]], [[ENTRY:%.*]] ] 193; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP10]], [[MIDDLE_BLOCK]] ], [ [[Y]], [[ENTRY]] ] 194; CHECK-NEXT: br label [[FOR_BODY:%.*]] 195; CHECK: for.body: 196; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[FOR_BODY]] ] 197; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[R_NEXT:%.*]], [[FOR_BODY]] ] 198; CHECK-NEXT: [[T0:%.*]] = and i32 [[R]], 1 199; CHECK-NEXT: [[R_NEXT]] = add i32 [[T0]], -1 200; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1 201; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[I]], 77 202; CHECK-NEXT: br i1 [[COND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] 203; CHECK: for.end: 204; CHECK-NEXT: [[T1:%.*]] = phi i32 [ [[R_NEXT]], [[FOR_BODY]] ], [ [[TMP10]], [[MIDDLE_BLOCK]] ] 205; CHECK-NEXT: ret i32 [[T1]] 206; 207entry: 208 br label %for.body 209 210for.body: 211 %i = phi i32 [ %x, %entry ], [ %i.next, %for.body ] 212 %r = phi i32 [ %y, %entry ], [ %r.next, %for.body ] 213 %t0 = and i32 %r, 1 214 %r.next = add i32 %t0, -1 215 %i.next = add nsw i32 %i, 1 216 %cond = icmp sgt i32 %i, 77 217 br i1 %cond, label %for.end, label %for.body 218 219for.end: 220 %t1 = phi i32 [ %r.next, %for.body ] 221 ret i32 %t1 222} 223 224define i32 @pr51794_signed_negative(i16 %iv.start, i32 %xor.start) { 225; CHECK-LABEL: @pr51794_signed_negative( 226; CHECK-NEXT: entry: 227; CHECK-NEXT: br label [[LOOP:%.*]] 228; CHECK: loop: 229; CHECK-NEXT: [[XOR_RED:%.*]] = phi i32 [ [[XOR_START:%.*]], [[ENTRY:%.*]] ], [ [[XOR:%.*]], [[LOOP]] ] 230; CHECK-NEXT: [[IV:%.*]] = phi i16 [ [[IV_START:%.*]], [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 231; CHECK-NEXT: [[IV_NEXT]] = add i16 [[IV]], -1 232; CHECK-NEXT: [[AND:%.*]] = and i32 [[XOR_RED]], 1 233; CHECK-NEXT: [[XOR]] = xor i32 [[AND]], -1 234; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i16 [[IV_NEXT]], 0 235; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[EXIT:%.*]], label [[LOOP]] 236; CHECK: exit: 237; CHECK-NEXT: [[XOR_LCSSA:%.*]] = phi i32 [ [[XOR]], [[LOOP]] ] 238; CHECK-NEXT: ret i32 [[XOR_LCSSA]] 239; 240entry: 241 br label %loop 242 243loop: 244 %xor.red = phi i32 [ %xor.start, %entry ], [ %xor, %loop ] 245 %iv = phi i16 [ %iv.start, %entry ], [ %iv.next, %loop ] 246 %iv.next = add i16 %iv, -1 247 %and = and i32 %xor.red, 1 248 %xor = xor i32 %and, -1 249 %tobool.not = icmp eq i16 %iv.next, 0 250 br i1 %tobool.not, label %exit, label %loop 251 252exit: 253 %xor.lcssa = phi i32 [ %xor, %loop ] 254 ret i32 %xor.lcssa 255} 256 257define i32 @pr52485_signed_negative(i32 %xor.start) { 258; CHECK-LABEL: @pr52485_signed_negative( 259; CHECK-NEXT: entry: 260; CHECK-NEXT: br label [[LOOP:%.*]] 261; CHECK: loop: 262; CHECK-NEXT: [[IV:%.*]] = phi i32 [ -23, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 263; CHECK-NEXT: [[XOR_RED:%.*]] = phi i32 [ [[XOR_START:%.*]], [[ENTRY]] ], [ [[XOR:%.*]], [[LOOP]] ] 264; CHECK-NEXT: [[AND:%.*]] = and i32 [[XOR_RED]], 255 265; CHECK-NEXT: [[XOR]] = xor i32 [[AND]], -9 266; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 2 267; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[IV_NEXT]], -15 268; CHECK-NEXT: br i1 [[CMP_NOT]], label [[EXIT:%.*]], label [[LOOP]] 269; CHECK: exit: 270; CHECK-NEXT: [[XOR_LCSSA:%.*]] = phi i32 [ [[XOR]], [[LOOP]] ] 271; CHECK-NEXT: ret i32 [[XOR_LCSSA]] 272; 273entry: 274 br label %loop 275 276loop: 277 %iv = phi i32 [ -23, %entry ], [ %iv.next, %loop ] 278 %xor.red = phi i32 [ %xor.start, %entry ], [ %xor, %loop ] 279 %and = and i32 %xor.red, 255 280 %xor = xor i32 %and, -9 281 %iv.next = add nuw nsw i32 %iv, 2 282 %cmp.not = icmp eq i32 %iv.next, -15 283 br i1 %cmp.not, label %exit, label %loop 284 285exit: 286 %xor.lcssa = phi i32 [ %xor, %loop ] 287 ret i32 %xor.lcssa 288} 289