1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s 3 4; TODO: Preserve disjoint flag on OR instruction. 5define void @generate_disjoint_flags(i64 %n, ptr noalias %x) { 6; CHECK-LABEL: define void @generate_disjoint_flags( 7; CHECK-SAME: i64 [[N:%.*]], ptr noalias [[X:%.*]]) { 8; CHECK-NEXT: entry: 9; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 4 10; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 11; CHECK: vector.ph: 12; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 4 13; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] 14; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 15; CHECK: vector.body: 16; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 17; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 18; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[X]], i64 [[TMP0]] 19; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0 20; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4 21; CHECK-NEXT: [[TMP3:%.*]] = or disjoint <4 x i32> [[WIDE_LOAD]], splat (i32 1) 22; CHECK-NEXT: [[TMP4:%.*]] = or <4 x i32> [[WIDE_LOAD]], splat (i32 3) 23; CHECK-NEXT: [[TMP5:%.*]] = add nuw nsw <4 x i32> [[TMP3]], [[TMP4]] 24; CHECK-NEXT: store <4 x i32> [[TMP5]], ptr [[TMP2]], align 4 25; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 26; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 27; CHECK-NEXT: br i1 [[TMP6]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 28; CHECK: middle.block: 29; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]] 30; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 31; CHECK: scalar.ph: 32; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 33; CHECK-NEXT: br label [[LOOP:%.*]] 34; CHECK: loop: 35; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 36; CHECK-NEXT: [[GEP_X:%.*]] = getelementptr inbounds i32, ptr [[X]], i64 [[IV]] 37; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[GEP_X]], align 4 38; CHECK-NEXT: [[OR_1:%.*]] = or disjoint i32 [[LV]], 1 39; CHECK-NEXT: [[OR_2:%.*]] = or i32 [[LV]], 3 40; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[OR_1]], [[OR_2]] 41; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP_X]], align 4 42; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 43; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]] 44; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]] 45; CHECK: exit: 46; CHECK-NEXT: ret void 47; 48entry: 49 br label %loop 50 51loop: 52 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] 53 %gep.x = getelementptr inbounds i32, ptr %x, i64 %iv 54 %lv = load i32, ptr %gep.x, align 4 55 %or.1 = or disjoint i32 %lv, 1 56 %or.2 = or i32 %lv, 3 57 %add = add nsw nuw i32 %or.1, %or.2 58 store i32 %add, ptr %gep.x, align 4 59 %iv.next = add i64 %iv, 1 60 %exitcond = icmp eq i64 %iv.next, %n 61 br i1 %exitcond, label %exit, label %loop 62 63exit: 64 ret void 65} 66;. 67; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} 68; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} 69; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} 70; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} 71;. 72