1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S < %s | FileCheck %s --check-prefix=CHECK 3 4define i64 @select_icmp_nuw_nsw(ptr %a, ptr %b, i64 %ii, i64 %n) { 5; CHECK-LABEL: define i64 @select_icmp_nuw_nsw( 6; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[II:%.*]], i64 [[N:%.*]]) { 7; CHECK-NEXT: [[ENTRY:.*]]: 8; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 4 9; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] 10; CHECK: [[VECTOR_PH]]: 11; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 4 12; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] 13; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] 14; CHECK: [[VECTOR_BODY]]: 15; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] 16; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] 17; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ] 18; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 0 19; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[TMP9]] 20; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[TMP10]], i32 0 21; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8 22; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[TMP9]] 23; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i64, ptr [[TMP3]], i32 0 24; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i64>, ptr [[TMP4]], align 8 25; CHECK-NEXT: [[TMP5:%.*]] = icmp sgt <4 x i64> [[WIDE_LOAD]], [[WIDE_LOAD1]] 26; CHECK-NEXT: [[TMP6]] = select <4 x i1> [[TMP5]], <4 x i64> [[VEC_IND]], <4 x i64> [[VEC_PHI]] 27; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 28; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4) 29; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 30; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 31; CHECK: [[MIDDLE_BLOCK]]: 32; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.vector.reduce.smax.v4i64(<4 x i64> [[TMP6]]) 33; CHECK-NEXT: [[RDX_SELECT_CMP:%.*]] = icmp ne i64 [[TMP8]], -9223372036854775808 34; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[RDX_SELECT_CMP]], i64 [[TMP8]], i64 [[II]] 35; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]] 36; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] 37; CHECK: [[SCALAR_PH]]: 38; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] 39; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i64 [ [[RDX_SELECT]], %[[MIDDLE_BLOCK]] ], [ [[II]], %[[ENTRY]] ] 40; CHECK-NEXT: br label %[[FOR_BODY:.*]] 41; CHECK: [[FOR_BODY]]: 42; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] 43; CHECK-NEXT: [[RDX:%.*]] = phi i64 [ [[COND:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ] 44; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]] 45; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8 46; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]] 47; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8 48; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[TMP0]], [[TMP1]] 49; CHECK-NEXT: [[COND]] = select i1 [[CMP2]], i64 [[IV]], i64 [[RDX]] 50; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[IV]], 1 51; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]] 52; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 53; CHECK: [[EXIT]]: 54; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i64 [ [[COND]], %[[FOR_BODY]] ], [ [[RDX_SELECT]], %[[MIDDLE_BLOCK]] ] 55; CHECK-NEXT: ret i64 [[COND_LCSSA]] 56; 57entry: 58 br label %for.body 59 60for.body: ; preds = %entry, %for.body 61 %iv = phi i64 [ %inc, %for.body ], [ 0, %entry ] 62 %rdx = phi i64 [ %cond, %for.body ], [ %ii, %entry ] 63 %arrayidx = getelementptr inbounds i64, ptr %a, i64 %iv 64 %0 = load i64, ptr %arrayidx, align 8 65 %arrayidx1 = getelementptr inbounds i64, ptr %b, i64 %iv 66 %1 = load i64, ptr %arrayidx1, align 8 67 %cmp2 = icmp sgt i64 %0, %1 68 %cond = select i1 %cmp2, i64 %iv, i64 %rdx 69 %inc = add nuw nsw i64 %iv, 1 70 %exitcond.not = icmp eq i64 %inc, %n 71 br i1 %exitcond.not, label %exit, label %for.body 72 73exit: ; preds = %for.body 74 ret i64 %cond 75} 76 77define i64 @select_icmp_nsw(ptr %a, ptr %b, i64 %ii, i64 %n) { 78; CHECK-LABEL: define i64 @select_icmp_nsw( 79; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[II:%.*]], i64 [[N:%.*]]) { 80; CHECK-NEXT: [[ENTRY:.*]]: 81; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 4 82; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] 83; CHECK: [[VECTOR_PH]]: 84; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 4 85; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] 86; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] 87; CHECK: [[VECTOR_BODY]]: 88; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] 89; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] 90; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ] 91; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 0 92; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[TMP9]] 93; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[TMP10]], i32 0 94; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i64>, ptr [[TMP2]], align 8 95; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[TMP9]] 96; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i64, ptr [[TMP3]], i32 0 97; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i64>, ptr [[TMP4]], align 8 98; CHECK-NEXT: [[TMP5:%.*]] = icmp sgt <4 x i64> [[WIDE_LOAD]], [[WIDE_LOAD1]] 99; CHECK-NEXT: [[TMP6]] = select <4 x i1> [[TMP5]], <4 x i64> [[VEC_IND]], <4 x i64> [[VEC_PHI]] 100; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 101; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4) 102; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 103; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 104; CHECK: [[MIDDLE_BLOCK]]: 105; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.vector.reduce.smax.v4i64(<4 x i64> [[TMP6]]) 106; CHECK-NEXT: [[RDX_SELECT_CMP:%.*]] = icmp ne i64 [[TMP8]], -9223372036854775808 107; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[RDX_SELECT_CMP]], i64 [[TMP8]], i64 [[II]] 108; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]] 109; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] 110; CHECK: [[SCALAR_PH]]: 111; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] 112; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i64 [ [[RDX_SELECT]], %[[MIDDLE_BLOCK]] ], [ [[II]], %[[ENTRY]] ] 113; CHECK-NEXT: br label %[[FOR_BODY:.*]] 114; CHECK: [[FOR_BODY]]: 115; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] 116; CHECK-NEXT: [[RDX:%.*]] = phi i64 [ [[COND:%.*]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ] 117; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]] 118; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8 119; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]] 120; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8 121; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[TMP0]], [[TMP1]] 122; CHECK-NEXT: [[COND]] = select i1 [[CMP2]], i64 [[IV]], i64 [[RDX]] 123; CHECK-NEXT: [[INC]] = add nsw i64 [[IV]], 1 124; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]] 125; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] 126; CHECK: [[EXIT]]: 127; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i64 [ [[COND]], %[[FOR_BODY]] ], [ [[RDX_SELECT]], %[[MIDDLE_BLOCK]] ] 128; CHECK-NEXT: ret i64 [[COND_LCSSA]] 129; 130entry: 131 br label %for.body 132 133for.body: ; preds = %entry, %for.body 134 %iv = phi i64 [ %inc, %for.body ], [ 0, %entry ] 135 %rdx = phi i64 [ %cond, %for.body ], [ %ii, %entry ] 136 %arrayidx = getelementptr inbounds i64, ptr %a, i64 %iv 137 %0 = load i64, ptr %arrayidx, align 8 138 %arrayidx1 = getelementptr inbounds i64, ptr %b, i64 %iv 139 %1 = load i64, ptr %arrayidx1, align 8 140 %cmp2 = icmp sgt i64 %0, %1 141 %cond = select i1 %cmp2, i64 %iv, i64 %rdx 142 %inc = add nsw i64 %iv, 1 143 %exitcond.not = icmp eq i64 %inc, %n 144 br i1 %exitcond.not, label %exit, label %for.body 145 146exit: ; preds = %for.body 147 ret i64 %cond 148} 149 150define i64 @select_icmp_nuw(ptr %a, ptr %b, i64 %ii, i64 %n) { 151; CHECK-LABEL: define i64 @select_icmp_nuw( 152; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[II:%.*]], i64 [[N:%.*]]) { 153; CHECK-NEXT: [[ENTRY:.*]]: 154; CHECK-NEXT: br label %[[FOR_BODY:.*]] 155; CHECK: [[FOR_BODY]]: 156; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ 0, %[[ENTRY]] ] 157; CHECK-NEXT: [[RDX:%.*]] = phi i64 [ [[COND:%.*]], %[[FOR_BODY]] ], [ [[II]], %[[ENTRY]] ] 158; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]] 159; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8 160; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]] 161; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8 162; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[TMP0]], [[TMP1]] 163; CHECK-NEXT: [[COND]] = select i1 [[CMP2]], i64 [[IV]], i64 [[RDX]] 164; CHECK-NEXT: [[INC]] = add nuw i64 [[IV]], 1 165; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]] 166; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[FOR_BODY]] 167; CHECK: [[EXIT]]: 168; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i64 [ [[COND]], %[[FOR_BODY]] ] 169; CHECK-NEXT: ret i64 [[COND_LCSSA]] 170; 171entry: 172 br label %for.body 173 174for.body: ; preds = %entry, %for.body 175 %iv = phi i64 [ %inc, %for.body ], [ 0, %entry ] 176 %rdx = phi i64 [ %cond, %for.body ], [ %ii, %entry ] 177 %arrayidx = getelementptr inbounds i64, ptr %a, i64 %iv 178 %0 = load i64, ptr %arrayidx, align 8 179 %arrayidx1 = getelementptr inbounds i64, ptr %b, i64 %iv 180 %1 = load i64, ptr %arrayidx1, align 8 181 %cmp2 = icmp sgt i64 %0, %1 182 %cond = select i1 %cmp2, i64 %iv, i64 %rdx 183 %inc = add nuw i64 %iv, 1 184 %exitcond.not = icmp eq i64 %inc, %n 185 br i1 %exitcond.not, label %exit, label %for.body 186 187exit: ; preds = %for.body 188 ret i64 %cond 189} 190 191define i64 @select_icmp_noflag(ptr %a, ptr %b, i64 %ii, i64 %n) { 192; CHECK-LABEL: define i64 @select_icmp_noflag( 193; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[II:%.*]], i64 [[N:%.*]]) { 194; CHECK-NEXT: [[ENTRY:.*]]: 195; CHECK-NEXT: br label %[[FOR_BODY:.*]] 196; CHECK: [[FOR_BODY]]: 197; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ 0, %[[ENTRY]] ] 198; CHECK-NEXT: [[RDX:%.*]] = phi i64 [ [[COND:%.*]], %[[FOR_BODY]] ], [ [[II]], %[[ENTRY]] ] 199; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]] 200; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8 201; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]] 202; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8 203; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[TMP0]], [[TMP1]] 204; CHECK-NEXT: [[COND]] = select i1 [[CMP2]], i64 [[IV]], i64 [[RDX]] 205; CHECK-NEXT: [[INC]] = add i64 [[IV]], 1 206; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]] 207; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[FOR_BODY]] 208; CHECK: [[EXIT]]: 209; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i64 [ [[COND]], %[[FOR_BODY]] ] 210; CHECK-NEXT: ret i64 [[COND_LCSSA]] 211; 212entry: 213 br label %for.body 214 215for.body: ; preds = %entry, %for.body 216 %iv = phi i64 [ %inc, %for.body ], [ 0, %entry ] 217 %rdx = phi i64 [ %cond, %for.body ], [ %ii, %entry ] 218 %arrayidx = getelementptr inbounds i64, ptr %a, i64 %iv 219 %0 = load i64, ptr %arrayidx, align 8 220 %arrayidx1 = getelementptr inbounds i64, ptr %b, i64 %iv 221 %1 = load i64, ptr %arrayidx1, align 8 222 %cmp2 = icmp sgt i64 %0, %1 223 %cond = select i1 %cmp2, i64 %iv, i64 %rdx 224 %inc = add i64 %iv, 1 225 %exitcond.not = icmp eq i64 %inc, %n 226 br i1 %exitcond.not, label %exit, label %for.body 227 228exit: ; preds = %for.body 229 ret i64 %cond 230} 231;. 232; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} 233; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} 234; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} 235; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} 236; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]} 237; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]} 238;. 239