1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -aa-pipeline=basic-aa -passes='loop-mssa(licm),loop-vectorize,dce,instcombine,loop-mssa(licm)' -force-vector-width=4 -S | FileCheck %s 3 4; First licm pass is to hoist/sink invariant stores if possible. Today LICM does 5; not hoist/sink the invariant stores. Even if that changes, we should still 6; vectorize this loop in case licm is not run. 7 8; The next licm pass after vectorization is to hoist/sink loop invariant 9; instructions. 10target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 11 12; This file separates tests with auto-generated check lines from 13; invariant-store-vectorization.ll for maintenance. 14; all tests check that it is legal to vectorize the stores to invariant 15; address. 16 17; Instcombine'd version of @inv_val_store_to_inv_address_conditional_diff_values. 18; Now the store is no longer of invariant value. 19; scalar store the value extracted from the last element of the vector value. 20define void @inv_val_store_to_inv_address_conditional_diff_values_ic(ptr %a, i64 %n, ptr %b, i32 %k) { 21; CHECK-LABEL: @inv_val_store_to_inv_address_conditional_diff_values_ic( 22; CHECK-NEXT: entry: 23; CHECK-NEXT: [[NTRUNC:%.*]] = trunc i64 [[N:%.*]] to i32 24; CHECK-NEXT: [[SMAX2:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1) 25; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp slt i64 [[N]], 4 26; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 27; CHECK: vector.memcheck: 28; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[N]], 2 29; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B:%.*]], i64 [[TMP0]] 30; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 4 31; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[SCEVGEP1]] 32; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]] 33; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 34; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 35; CHECK: vector.ph: 36; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX2]], 9223372036854775804 37; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[K:%.*]], i64 0 38; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer 39; CHECK-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i64 0 40; CHECK-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT3]], <4 x i32> poison, <4 x i32> zeroinitializer 41; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 42; CHECK: vector.body: 43; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 44; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]] 45; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 8, !alias.scope [[META0:![0-9]+]], !noalias [[META3:![0-9]+]] 46; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], [[BROADCAST_SPLAT]] 47; CHECK-NEXT: store <4 x i32> [[BROADCAST_SPLAT4]], ptr [[TMP1]], align 4, !alias.scope [[META0]], !noalias [[META3]] 48; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[DOTNOT]], <4 x i32> [[BROADCAST_SPLAT4]], <4 x i32> [[BROADCAST_SPLAT]] 49; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[PREDPHI]], i64 3 50; CHECK-NEXT: store i32 [[TMP2]], ptr [[A]], align 4, !alias.scope [[META3]] 51; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 52; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 53; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] 54; CHECK: middle.block: 55; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX2]], [[N_VEC]] 56; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] 57; CHECK: scalar.ph: 58; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ENTRY:%.*]] ] 59; CHECK-NEXT: br label [[FOR_BODY:%.*]] 60; CHECK: for.body: 61; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[LATCH:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 62; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[I]] 63; CHECK-NEXT: [[I2:%.*]] = load i32, ptr [[I1]], align 8 64; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[I2]], [[K]] 65; CHECK-NEXT: store i32 [[NTRUNC]], ptr [[I1]], align 4 66; CHECK-NEXT: br i1 [[CMP]], label [[COND_STORE:%.*]], label [[COND_STORE_K:%.*]] 67; CHECK: cond_store: 68; CHECK-NEXT: br label [[LATCH]] 69; CHECK: cond_store_k: 70; CHECK-NEXT: br label [[LATCH]] 71; CHECK: latch: 72; CHECK-NEXT: [[STOREVAL:%.*]] = phi i32 [ [[NTRUNC]], [[COND_STORE]] ], [ [[K]], [[COND_STORE_K]] ] 73; CHECK-NEXT: store i32 [[STOREVAL]], ptr [[A]], align 4 74; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 75; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] 76; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]], !llvm.loop [[LOOP8:![0-9]+]] 77; CHECK: for.end.loopexit: 78; CHECK-NEXT: br label [[FOR_END]] 79; CHECK: for.end: 80; CHECK-NEXT: ret void 81; 82entry: 83 %ntrunc = trunc i64 %n to i32 84 br label %for.body 85 86for.body: ; preds = %for.body, %entry 87 %i = phi i64 [ %i.next, %latch ], [ 0, %entry ] 88 %i1 = getelementptr inbounds i32, ptr %b, i64 %i 89 %i2 = load i32, ptr %i1, align 8 90 %cmp = icmp eq i32 %i2, %k 91 store i32 %ntrunc, ptr %i1 92 br i1 %cmp, label %cond_store, label %cond_store_k 93 94cond_store: 95 br label %latch 96 97cond_store_k: 98 br label %latch 99 100latch: 101 %storeval = phi i32 [ %ntrunc, %cond_store ], [ %k, %cond_store_k ] 102 store i32 %storeval, ptr %a 103 %i.next = add nuw nsw i64 %i, 1 104 %cond = icmp slt i64 %i.next, %n 105 br i1 %cond, label %for.body, label %for.end 106 107for.end: ; preds = %for.body 108 ret void 109} 110 111; invariant val stored to invariant address predicated on invariant condition 112; This is not treated as a predicated store since the block the store belongs to 113; is the latch block (which doesn't need to be predicated). 114; variant/invariant values being stored to invariant address. 115; test checks that the last element of the phi is extracted and scalar stored 116; into the uniform address within the loop. 117; Since the condition and the phi is loop invariant, they are LICM'ed after 118; vectorization. 119define void @inv_val_store_to_inv_address_conditional_inv(ptr %a, i64 %n, ptr %b, i32 %k) { 120; CHECK-LABEL: @inv_val_store_to_inv_address_conditional_inv( 121; CHECK-NEXT: entry: 122; CHECK-NEXT: [[NTRUNC:%.*]] = trunc i64 [[N:%.*]] to i32 123; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[K:%.*]], [[NTRUNC]] 124; CHECK-NEXT: [[SMAX2:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1) 125; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp slt i64 [[N]], 4 126; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 127; CHECK: vector.memcheck: 128; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[N]], 2 129; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[B:%.*]], i64 [[TMP0]] 130; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 4 131; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[B]], [[SCEVGEP1]] 132; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]] 133; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 134; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 135; CHECK: vector.ph: 136; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX2]], 9223372036854775804 137; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i1> poison, i1 [[CMP]], i64 0 138; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i64 0 139; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer 140; CHECK-NEXT: [[BROADCAST_SPLAT6:%.*]] = insertelement <4 x i32> poison, i32 [[K]], i64 0 141; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[BROADCAST_SPLAT]], <4 x i32> [[BROADCAST_SPLAT6]] 142; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[PREDPHI]], i64 0 143; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 144; CHECK: vector.body: 145; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 146; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]] 147; CHECK-NEXT: store <4 x i32> [[BROADCAST_SPLAT]], ptr [[TMP3]], align 4, !alias.scope [[META9:![0-9]+]], !noalias [[META12:![0-9]+]] 148; CHECK-NEXT: store i32 [[TMP2]], ptr [[A]], align 4, !alias.scope [[META12]] 149; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 150; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 151; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]] 152; CHECK: middle.block: 153; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX2]], [[N_VEC]] 154; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] 155; CHECK: scalar.ph: 156; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ENTRY:%.*]] ] 157; CHECK-NEXT: br label [[FOR_BODY:%.*]] 158; CHECK: for.body: 159; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[LATCH:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 160; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[I]] 161; CHECK-NEXT: store i32 [[NTRUNC]], ptr [[I1]], align 4 162; CHECK-NEXT: br i1 [[CMP]], label [[COND_STORE:%.*]], label [[COND_STORE_K:%.*]] 163; CHECK: cond_store: 164; CHECK-NEXT: br label [[LATCH]] 165; CHECK: cond_store_k: 166; CHECK-NEXT: br label [[LATCH]] 167; CHECK: latch: 168; CHECK-NEXT: [[STOREVAL:%.*]] = phi i32 [ [[NTRUNC]], [[COND_STORE]] ], [ [[K]], [[COND_STORE_K]] ] 169; CHECK-NEXT: store i32 [[STOREVAL]], ptr [[A]], align 4 170; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 171; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] 172; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]], !llvm.loop [[LOOP15:![0-9]+]] 173; CHECK: for.end.loopexit: 174; CHECK-NEXT: br label [[FOR_END]] 175; CHECK: for.end: 176; CHECK-NEXT: ret void 177; 178entry: 179 %ntrunc = trunc i64 %n to i32 180 %cmp = icmp eq i32 %ntrunc, %k 181 br label %for.body 182 183for.body: ; preds = %for.body, %entry 184 %i = phi i64 [ %i.next, %latch ], [ 0, %entry ] 185 %i1 = getelementptr inbounds i32, ptr %b, i64 %i 186 %i2 = load i32, ptr %i1, align 8 187 store i32 %ntrunc, ptr %i1 188 br i1 %cmp, label %cond_store, label %cond_store_k 189 190cond_store: 191 br label %latch 192 193cond_store_k: 194 br label %latch 195 196latch: 197 %storeval = phi i32 [ %ntrunc, %cond_store ], [ %k, %cond_store_k ] 198 store i32 %storeval, ptr %a 199 %i.next = add nuw nsw i64 %i, 1 200 %cond = icmp slt i64 %i.next, %n 201 br i1 %cond, label %for.body, label %for.end 202 203for.end: ; preds = %for.body 204 ret void 205} 206 207; variant value stored to uniform address tests that the code gen extracts the 208; last element from the variant vector and scalar stores it into the uniform 209; address. 210define i32 @variant_val_store_to_inv_address(ptr %a, i64 %n, ptr %b, i32 %k) { 211; CHECK-LABEL: @variant_val_store_to_inv_address( 212; CHECK-NEXT: entry: 213; CHECK-NEXT: [[SMAX2:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1) 214; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp slt i64 [[N]], 4 215; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 216; CHECK: vector.memcheck: 217; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 4 218; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[N]], 2 219; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B:%.*]], i64 [[TMP0]] 220; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]] 221; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]] 222; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 223; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 224; CHECK: vector.ph: 225; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX2]], 9223372036854775804 226; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 227; CHECK: vector.body: 228; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 229; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP3:%.*]], [[VECTOR_BODY]] ] 230; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]] 231; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 8, !alias.scope [[META16:![0-9]+]] 232; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 3 233; CHECK-NEXT: store i32 [[TMP2]], ptr [[A]], align 4, !alias.scope [[META19:![0-9]+]], !noalias [[META16]] 234; CHECK-NEXT: [[TMP3]] = add <4 x i32> [[VEC_PHI]], [[WIDE_LOAD]] 235; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 236; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 237; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]] 238; CHECK: middle.block: 239; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi <4 x i32> [ [[TMP3]], [[VECTOR_BODY]] ] 240; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[DOTLCSSA]]) 241; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX2]], [[N_VEC]] 242; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] 243; CHECK: scalar.ph: 244; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ENTRY:%.*]] ] 245; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP5]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ENTRY]] ] 246; CHECK-NEXT: br label [[FOR_BODY:%.*]] 247; CHECK: for.body: 248; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 249; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[I3:%.*]], [[FOR_BODY]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 250; CHECK-NEXT: [[I1:%.*]] = getelementptr inbounds nuw i32, ptr [[B]], i64 [[I]] 251; CHECK-NEXT: [[I2:%.*]] = load i32, ptr [[I1]], align 8 252; CHECK-NEXT: store i32 [[I2]], ptr [[A]], align 4 253; CHECK-NEXT: [[I3]] = add i32 [[I0]], [[I2]] 254; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 255; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] 256; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]], !llvm.loop [[LOOP22:![0-9]+]] 257; CHECK: for.end.loopexit: 258; CHECK-NEXT: [[I3_LCSSA:%.*]] = phi i32 [ [[I3]], [[FOR_BODY]] ] 259; CHECK-NEXT: br label [[FOR_END]] 260; CHECK: for.end: 261; CHECK-NEXT: [[RDX_LCSSA:%.*]] = phi i32 [ [[TMP5]], [[MIDDLE_BLOCK]] ], [ [[I3_LCSSA]], [[FOR_END_LOOPEXIT]] ] 262; CHECK-NEXT: ret i32 [[RDX_LCSSA]] 263; 264entry: 265 %ntrunc = trunc i64 %n to i32 266 %cmp = icmp eq i32 %ntrunc, %k 267 br label %for.body 268 269for.body: ; preds = %for.body, %entry 270 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ] 271 %i0 = phi i32 [ %i3, %for.body ], [ 0, %entry ] 272 %i1 = getelementptr inbounds i32, ptr %b, i64 %i 273 %i2 = load i32, ptr %i1, align 8 274 store i32 %i2, ptr %a 275 %i3 = add i32 %i0, %i2 276 %i.next = add nuw nsw i64 %i, 1 277 %cond = icmp slt i64 %i.next, %n 278 br i1 %cond, label %for.body, label %for.end 279 280for.end: ; preds = %for.body 281 %rdx.lcssa = phi i32 [ %i3, %for.body ] 282 ret i32 %rdx.lcssa 283} 284