1; RUN: opt -S -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -enable-interleaved-mem-accesses=true < %s | FileCheck %s 2 3; When merging two stores with interleaved access vectorization, make sure we 4; propagate the alias information from all scalar stores to form the most 5; generic alias info. 6 7target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 8target triple = "arm64-apple-ios5.0.0" 9 10%struct.Vec4r = type { double, double, double, double } 11%struct.Vec2r = type { double, double } 12 13define void @foobar(ptr nocapture readonly %p, i32 %i) 14{ 15entry: 16 %cp = alloca [20 x %struct.Vec2r], align 8 17 br label %for.body 18 19for.cond.cleanup: ; preds = %for.body 20 call void @g(ptr nonnull %cp) #4 21 ret void 22 23for.body: ; preds = %for.body, %entry 24 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 25 %x = getelementptr inbounds %struct.Vec4r, ptr %p, i64 %indvars.iv, i32 0 26 %0 = load double, ptr %x, align 8, !tbaa !3 27 %mul = fmul double %0, 2.000000e+00 28 %x4 = getelementptr inbounds [20 x %struct.Vec2r], ptr %cp, i64 0, i64 %indvars.iv, i32 0 29 30; The new store should alias any double rather than one of the fields of Vec2r. 31; CHECK: store <4 x double> {{.*}} !tbaa ![[STORE_TBAA:[0-9]+]] 32; CHECK-DAG: ![[DOUBLE_TBAA:[0-9]+]] = !{!"double", !{{[0-9+]}}, i64 0} 33; CHECK-DAG: ![[STORE_TBAA]] = !{![[DOUBLE_TBAA]], ![[DOUBLE_TBAA]], i64 0} 34 store double %mul, ptr %x4, align 8, !tbaa !8 35 %y = getelementptr inbounds %struct.Vec4r, ptr %p, i64 %indvars.iv, i32 1 36 %1 = load double, ptr %y, align 8, !tbaa !10 37 %mul7 = fmul double %1, 3.000000e+00 38 %y10 = getelementptr inbounds [20 x %struct.Vec2r], ptr %cp, i64 0, i64 %indvars.iv, i32 1 39 store double %mul7, ptr %y10, align 8, !tbaa !11 40 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 41 %exitcond = icmp eq i64 %indvars.iv.next, 4 42 br i1 %exitcond, label %for.cond.cleanup, label %for.body 43} 44 45declare void @g(ptr) 46 47!llvm.module.flags = !{!0, !1} 48!llvm.ident = !{!2} 49 50!0 = !{i32 1, !"wchar_size", i32 4} 51!1 = !{i32 7, !"PIC Level", i32 2} 52!2 = !{!"clang version 6.0.0 (trunk 319007) (llvm/trunk 319324)"} 53!3 = !{!4, !5, i64 0} 54!4 = !{!"Vec4r", !5, i64 0, !5, i64 8, !5, i64 16, !5, i64 24} 55!5 = !{!"double", !6, i64 0} 56!6 = !{!"omnipotent char", !7, i64 0} 57!7 = !{!"Simple C/C++ TBAA"} 58!8 = !{!9, !5, i64 0} 59!9 = !{!"Vec2r", !5, i64 0, !5, i64 8} 60!10 = !{!4, !5, i64 8} 61!11 = !{!9, !5, i64 8} 62