1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt -S -passes=loop-vectorize,instcombine -force-vector-width=4 -force-vector-interleave=1 -enable-interleaved-mem-accesses=true < %s | FileCheck %s 3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 5 6; Check that the interleaved-mem-access analysis currently does not create an 7; interleave group for access 'a' due to the possible pointer wrap-around. 8; 9; To begin with, in this test the candidate interleave group can be created 10; only when getPtrStride is called with Assume=true. Next, because 11; the interleave-group of the loads is not full (has gaps), we also need to check 12; for possible pointer wrapping. Here we currently use Assume=false and as a 13; result cannot prove the transformation is safe and therefore invalidate the 14; candidate interleave group. 15; 16 17; void func(unsigned * __restrict a, unsigned * __restrict b, unsigned char x, unsigned char y) { 18; int i = 0; 19; for (unsigned char index = x; i < y; index +=2, ++i) 20; b[i] = aptr 2; 21; 22; } 23 24define void @_Z4funcPjS_hh(ptr noalias nocapture readonly %a, ptr noalias nocapture %b, i8 zeroext %x, i8 zeroext %y) local_unnamed_addr { 25; CHECK-LABEL: define void @_Z4funcPjS_hh( 26; CHECK-SAME: ptr noalias readonly captures(none) [[A:%.*]], ptr noalias captures(none) [[B:%.*]], i8 zeroext [[X:%.*]], i8 zeroext [[Y:%.*]]) local_unnamed_addr { 27; CHECK-NEXT: [[ENTRY:.*:]] 28; CHECK-NEXT: [[CMP9:%.*]] = icmp eq i8 [[Y]], 0 29; CHECK-NEXT: br i1 [[CMP9]], label %[[FOR_COND_CLEANUP:.*]], label %[[FOR_BODY_PREHEADER:.*]] 30; CHECK: [[FOR_BODY_PREHEADER]]: 31; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i8 [[Y]] to i64 32; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i8 [[Y]], 5 33; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]] 34; CHECK: [[VECTOR_SCEVCHECK]]: 35; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[WIDE_TRIP_COUNT]], -1 36; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i8 37; CHECK-NEXT: [[MUL_RESULT:%.*]] = shl i8 [[TMP1]], 1 38; CHECK-NEXT: [[TMP2:%.*]] = xor i8 [[X]], -1 39; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i8 [[MUL_RESULT]], [[TMP2]] 40; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i64 [[TMP0]], 127 41; CHECK-NEXT: [[TMP5:%.*]] = or i1 [[TMP3]], [[TMP4]] 42; CHECK-NEXT: br i1 [[TMP5]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] 43; CHECK: [[VECTOR_PH]]: 44; CHECK-NEXT: [[N_MOD_VF:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 3 45; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 46; CHECK-NEXT: [[TMP7:%.*]] = select i1 [[TMP8]], i64 4, i64 [[N_MOD_VF]] 47; CHECK-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[WIDE_TRIP_COUNT]], [[TMP7]] 48; CHECK-NEXT: [[DOTCAST:%.*]] = trunc i64 [[N_VEC]] to i8 49; CHECK-NEXT: [[TMP6:%.*]] = shl i8 [[DOTCAST]], 1 50; CHECK-NEXT: [[IND_END:%.*]] = add i8 [[X]], [[TMP6]] 51; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] 52; CHECK: [[VECTOR_BODY]]: 53; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] 54; CHECK-NEXT: [[DOTCAST3:%.*]] = trunc i64 [[INDEX]] to i8 55; CHECK-NEXT: [[TMP9:%.*]] = shl i8 [[DOTCAST3]], 1 56; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i8 [[X]], [[TMP9]] 57; CHECK-NEXT: [[TMP14:%.*]] = zext i8 [[OFFSET_IDX]] to i64 58; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[TMP14]] 59; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP15]], align 4 60; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 61; CHECK-NEXT: [[TMP24:%.*]] = shl <4 x i32> [[TMP23]], splat (i32 1) 62; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]] 63; CHECK-NEXT: store <4 x i32> [[TMP24]], ptr [[TMP25]], align 4 64; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 65; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 66; CHECK-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 67; CHECK: [[MIDDLE_BLOCK]]: 68; CHECK-NEXT: br label %[[SCALAR_PH]] 69; CHECK: [[SCALAR_PH]]: 70; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[VECTOR_SCEVCHECK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ] 71; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi i8 [ [[IND_END]], %[[MIDDLE_BLOCK]] ], [ [[X]], %[[VECTOR_SCEVCHECK]] ], [ [[X]], %[[FOR_BODY_PREHEADER]] ] 72; CHECK-NEXT: br label %[[FOR_BODY:.*]] 73; CHECK: [[FOR_COND_CLEANUP_LOOPEXIT:.*]]: 74; CHECK-NEXT: br label %[[FOR_COND_CLEANUP]] 75; CHECK: [[FOR_COND_CLEANUP]]: 76; CHECK-NEXT: ret void 77; CHECK: [[FOR_BODY]]: 78; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] 79; CHECK-NEXT: [[INDEX_011:%.*]] = phi i8 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ] 80; CHECK-NEXT: [[IDXPROM:%.*]] = zext i8 [[INDEX_011]] to i64 81; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr [[A]], i64 [[IDXPROM]] 82; CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 83; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[TMP27]], 1 84; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDVARS_IV]] 85; CHECK-NEXT: store i32 [[MUL]], ptr [[ARRAYIDX2]], align 4 86; CHECK-NEXT: [[ADD]] = add i8 [[INDEX_011]], 2 87; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 88; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 89; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 90; 91entry: 92 %cmp9 = icmp eq i8 %y, 0 93 br i1 %cmp9, label %for.cond.cleanup, label %for.body.preheader 94 95for.body.preheader: 96 %wide.trip.count = zext i8 %y to i64 97 br label %for.body 98 99for.cond.cleanup.loopexit: 100 br label %for.cond.cleanup 101 102for.cond.cleanup: 103 ret void 104 105for.body: 106 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ] 107 %index.011 = phi i8 [ %add, %for.body ], [ %x, %for.body.preheader ] 108 %idxprom = zext i8 %index.011 to i64 109 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %idxprom 110 %0 = load i32, ptr %arrayidx, align 4 111 %mul = shl i32 %0, 1 112 %arrayidx2 = getelementptr inbounds i32, ptr %b, i64 %indvars.iv 113 store i32 %mul, ptr %arrayidx2, align 4 114 %add = add i8 %index.011, 2 115 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 116 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count 117 br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body 118} 119;. 120; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} 121; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} 122; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} 123; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]]} 124;. 125