1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck %s 3 4 5; Test case where %gep has multiple uses of %iv. 6define void @multiple_iv_uses_in_same_instruction(ptr %ptr) { 7; CHECK-LABEL: @multiple_iv_uses_in_same_instruction( 8; CHECK-NEXT: entry: 9; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 10; CHECK: vector.ph: 11; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 12; CHECK: vector.body: 13; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 14; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 15; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1 16; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDEX]] to i32 17; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 0 18; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], 1 19; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr [[PTR:%.*]], i64 0, i64 [[TMP0]], i64 [[TMP0]] 20; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr [[PTR]], i64 0, i64 [[TMP1]], i64 [[TMP1]] 21; CHECK-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4 22; CHECK-NEXT: store i32 [[TMP4]], ptr [[TMP6]], align 4 23; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 24; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 25; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 26; CHECK: middle.block: 27; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 28; CHECK: scalar.ph: 29; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 30; CHECK-NEXT: br label [[LOOP:%.*]] 31; CHECK: loop: 32; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 33; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr [[PTR]], i64 0, i64 [[IV]], i64 [[IV]] 34; CHECK-NEXT: [[T:%.*]] = trunc i64 [[IV]] to i32 35; CHECK-NEXT: store i32 [[T]], ptr [[GEP]], align 4 36; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 37; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], 100 38; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]] 39; CHECK: exit: 40; CHECK-NEXT: ret void 41; 42entry: 43 br label %loop 44 45loop: 46 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] 47 %gep = getelementptr inbounds [100 x [100 x i32]], ptr %ptr, i64 0, i64 %iv, i64 %iv 48 %t = trunc i64 %iv to i32 49 store i32 %t, ptr %gep, align 4 50 %iv.next = add nuw nsw i64 %iv, 1 51 %exitcond = icmp eq i64 %iv.next, 100 52 br i1 %exitcond, label %exit, label %loop 53 54exit: 55 ret void 56} 57