1; RUN: opt < %s -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -enable-if-conversion 2 3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 4 5define fastcc void @DD_dump() nounwind uwtable ssp { 6entry: 7 br i1 true, label %lor.lhs.false, label %if.end25 8 9lor.lhs.false: ; preds = %entry 10 br i1 false, label %if.end21, label %if.else 11 12if.else: ; preds = %lor.lhs.false 13 br i1 false, label %num_q.exit, label %while.body.i.preheader 14 15while.body.i.preheader: ; preds = %if.else 16 br label %while.body.i 17 18while.body.i: ; preds = %if.end.i, %while.body.i.preheader 19 switch i8 0, label %if.end.i [ 20 i8 39, label %if.then.i 21 i8 92, label %if.then.i 22 ] 23 24if.then.i: ; preds = %while.body.i, %while.body.i 25 br label %if.end.i 26 27if.end.i: ; preds = %if.then.i, %while.body.i 28 br i1 false, label %num_q.exit, label %while.body.i 29 30num_q.exit: ; preds = %if.end.i, %if.else 31 unreachable 32 33if.end21: ; preds = %lor.lhs.false 34 unreachable 35 36if.end25: ; preds = %entry 37 ret void 38} 39 40; PR15990 41; We can have basic blocks with single entry PHI nodes. 42define void @single_entry_phi(ptr %a, ptr %b) { 43entry: 44 br label %for.cond1.preheader 45 46for.cond1.preheader: 47 %inc10 = phi i32 [ 0, %entry ], [ %inc, %for.end ] 48 br label %for.end 49 50for.end: 51 %malicious.phi = phi i32 [ 0, %for.cond1.preheader ] 52 %inc = add nsw i32 %inc10, 1 53 %tobool = icmp eq i32 %inc, 0 54 br i1 %tobool, label %for.cond.for.end5, label %for.cond1.preheader 55 56for.cond.for.end5: 57 %and.lcssa = phi i32 [ %malicious.phi, %for.end ] 58 store i32 %and.lcssa, ptr %a, align 4 59 ret void 60} 61