1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=loop-vectorize,dce,instcombine -S -force-vector-width=4 < %s 2>%t | FileCheck %s 3 4define void @inv_store_last_lane(ptr noalias nocapture %a, ptr noalias nocapture %inv, ptr noalias nocapture readonly %b, i64 %n) { 5; CHECK-LABEL: @inv_store_last_lane( 6; CHECK-NEXT: entry: 7; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4 8; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 9; CHECK: vector.ph: 10; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4 11; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 12; CHECK: vector.body: 13; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 14; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[INDEX]] 15; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4 16; CHECK-NEXT: [[TMP1:%.*]] = shl nsw <4 x i32> [[WIDE_LOAD]], splat (i32 1) 17; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDEX]] 18; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP2]], align 4 19; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 20; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 21; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 22; CHECK: middle.block: 23; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i32> [[TMP1]], i64 3 24; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]] 25; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 26; CHECK: scalar.ph: 27; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 28; CHECK-NEXT: br label [[FOR_BODY:%.*]] 29; CHECK: for.body: 30; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 31; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDVARS_IV]] 32; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 33; CHECK-NEXT: [[MUL:%.*]] = shl nsw i32 [[TMP5]], 1 34; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV]] 35; CHECK-NEXT: store i32 [[MUL]], ptr [[ARRAYIDX2]], align 4 36; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 37; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[N]] 38; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[EXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 39; CHECK: exit: 40; CHECK-NEXT: [[MUL_LCSSA:%.*]] = phi i32 [ [[MUL]], [[FOR_BODY]] ], [ [[TMP4]], [[MIDDLE_BLOCK]] ] 41; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw i8, ptr [[INV:%.*]], i64 168 42; CHECK-NEXT: store i32 [[MUL_LCSSA]], ptr [[ARRAYIDX5]], align 4 43; CHECK-NEXT: ret void 44; 45entry: 46 br label %for.body 47 48for.body: ; preds = %entry, %for.body 49 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 50 %arrayidx = getelementptr inbounds i32, ptr %b, i64 %indvars.iv 51 %0 = load i32, ptr %arrayidx, align 4 52 %mul = shl nsw i32 %0, 1 53 %arrayidx2 = getelementptr inbounds i32, ptr %a, i64 %indvars.iv 54 store i32 %mul, ptr %arrayidx2, align 4 55 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 56 %exitcond.not = icmp eq i64 %indvars.iv.next, %n 57 br i1 %exitcond.not, label %exit, label %for.body 58 59exit: ; preds = %for.body 60 %arrayidx5 = getelementptr inbounds i32, ptr %inv, i64 42 61 store i32 %mul, ptr %arrayidx5, align 4 62 ret void 63} 64 65define float @ret_last_lane(ptr noalias nocapture %a, ptr noalias nocapture readonly %b, i64 %n) { 66; CHECK-LABEL: @ret_last_lane( 67; CHECK-NEXT: entry: 68; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4 69; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 70; CHECK: vector.ph: 71; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4 72; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 73; CHECK: vector.body: 74; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 75; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[B:%.*]], i64 [[INDEX]] 76; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 4 77; CHECK-NEXT: [[TMP1:%.*]] = fmul <4 x float> [[WIDE_LOAD]], splat (float 2.000000e+00) 78; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[INDEX]] 79; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4 80; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 81; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 82; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 83; CHECK: middle.block: 84; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP1]], i64 3 85; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]] 86; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 87; CHECK: scalar.ph: 88; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 89; CHECK-NEXT: br label [[FOR_BODY:%.*]] 90; CHECK: for.body: 91; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 92; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDVARS_IV]] 93; CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[ARRAYIDX]], align 4 94; CHECK-NEXT: [[MUL:%.*]] = fmul float [[TMP5]], 2.000000e+00 95; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] 96; CHECK-NEXT: store float [[MUL]], ptr [[ARRAYIDX2]], align 4 97; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 98; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[N]] 99; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[EXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] 100; CHECK: exit: 101; CHECK-NEXT: [[MUL_LCSSA:%.*]] = phi float [ [[MUL]], [[FOR_BODY]] ], [ [[TMP4]], [[MIDDLE_BLOCK]] ] 102; CHECK-NEXT: ret float [[MUL_LCSSA]] 103; 104entry: 105 br label %for.body 106 107for.body: ; preds = %for.body.preheader, %for.body 108 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 109 %arrayidx = getelementptr inbounds float, ptr %b, i64 %indvars.iv 110 %0 = load float, ptr %arrayidx, align 4 111 %mul = fmul float %0, 2.000000e+00 112 %arrayidx2 = getelementptr inbounds float, ptr %a, i64 %indvars.iv 113 store float %mul, ptr %arrayidx2, align 4 114 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 115 %exitcond.not = icmp eq i64 %indvars.iv.next, %n 116 br i1 %exitcond.not, label %exit, label %for.body 117 118exit: ; preds = %for.body, %entry 119 ret float %mul 120} 121