1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=loop-vectorize -force-vector-width=4 -S | FileCheck %s 3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 5 6; Make sure the loop is vectorized under -Os without folding its tail based on 7; its trip-count's lower bits known to be zero. 8 9define dso_local void @alignTC(ptr noalias nocapture %A, i32 %n) optsize { 10; CHECK-LABEL: @alignTC( 11; CHECK-NEXT: entry: 12; CHECK-NEXT: [[ALIGNEDTC:%.*]] = and i32 [[N:%.*]], -8 13; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[ALIGNEDTC]], 4 14; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 15; CHECK: vector.ph: 16; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[ALIGNEDTC]], 4 17; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[ALIGNEDTC]], [[N_MOD_VF]] 18; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 19; CHECK: vector.body: 20; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 21; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 22; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[TMP0]] 23; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0 24; CHECK-NEXT: store <4 x i32> splat (i32 13), ptr [[TMP2]], align 1 25; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 26; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 27; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 28; CHECK: middle.block: 29; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[ALIGNEDTC]], [[N_VEC]] 30; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 31; CHECK: scalar.ph: 32; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 33; CHECK-NEXT: br label [[LOOP:%.*]] 34; CHECK: loop: 35; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [[LOOP]] ] 36; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[RIV]] 37; CHECK-NEXT: store i32 13, ptr [[ARRAYIDX]], align 1 38; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1 39; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], [[ALIGNEDTC]] 40; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]] 41; CHECK: exit: 42; CHECK-NEXT: ret void 43; 44entry: 45 %alignedTC = and i32 %n, -8 46 br label %loop 47 48loop: 49 %riv = phi i32 [ 0, %entry ], [ %rivPlus1, %loop ] 50 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %riv 51 store i32 13, ptr %arrayidx, align 1 52 %rivPlus1 = add nuw nsw i32 %riv, 1 53 %cond = icmp eq i32 %rivPlus1, %alignedTC 54 br i1 %cond, label %exit, label %loop 55 56exit: 57 ret void 58} 59 60; Make sure the loop is vectorized under -Os without folding its tail based on 61; its trip-count's lower bits assumed to be zero. 62 63define dso_local void @assumeAlignedTC(ptr noalias nocapture %A, i32 %p, i32 %q) optsize { 64; CHECK-LABEL: @assumeAlignedTC( 65; CHECK-NEXT: entry: 66; CHECK-NEXT: [[AND1:%.*]] = and i32 [[P:%.*]], 3 67; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[AND1]], 0 68; CHECK-NEXT: br i1 [[CMP1]], label [[GUARDED:%.*]], label [[EXIT:%.*]] 69; CHECK: guarded: 70; CHECK-NEXT: [[REM:%.*]] = urem i32 [[Q:%.*]], 8 71; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[REM]], 0 72; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP2]]) 73; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[P]], [[Q]] 74; CHECK-NEXT: [[N:%.*]] = select i1 [[GT]], i32 [[P]], i32 [[Q]] 75; CHECK-NEXT: [[CMP110:%.*]] = icmp sgt i32 [[N]], 0 76; CHECK-NEXT: br i1 [[CMP110]], label [[LOOP_PREHEADER:%.*]], label [[EXIT]] 77; CHECK: loop.preheader: 78; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4 79; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 80; CHECK: vector.ph: 81; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 4 82; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]] 83; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 84; CHECK: vector.body: 85; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 86; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 87; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[TMP0]] 88; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0 89; CHECK-NEXT: store <4 x i32> splat (i32 13), ptr [[TMP2]], align 1 90; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 91; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 92; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 93; CHECK: middle.block: 94; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]] 95; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 96; CHECK: scalar.ph: 97; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 98; CHECK-NEXT: br label [[LOOP:%.*]] 99; CHECK: loop: 100; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[RIVPLUS1:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 101; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[RIV]] 102; CHECK-NEXT: store i32 13, ptr [[ARRAYIDX]], align 1 103; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1 104; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], [[N]] 105; CHECK-NEXT: br i1 [[COND]], label [[EXIT_LOOPEXIT]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]] 106; CHECK: exit.loopexit: 107; CHECK-NEXT: br label [[EXIT]] 108; CHECK: exit: 109; CHECK-NEXT: ret void 110; 111entry: 112 %and1 = and i32 %p, 3 113 %cmp1 = icmp eq i32 %and1, 0 114 br i1 %cmp1, label %guarded, label %exit 115 116guarded: 117 %rem = urem i32 %q, 8 118 %cmp2 = icmp eq i32 %rem, 0 119 tail call void @llvm.assume(i1 %cmp2) 120 %gt = icmp sgt i32 %p, %q 121 %n = select i1 %gt, i32 %p, i32 %q 122 %cmp110 = icmp sgt i32 %n, 0 123 br i1 %cmp110, label %loop, label %exit 124 125loop: 126 %riv = phi i32 [ 0, %guarded ], [ %rivPlus1, %loop ] 127 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %riv 128 store i32 13, ptr %arrayidx, align 1 129 %rivPlus1 = add nuw nsw i32 %riv, 1 130 %cond = icmp eq i32 %rivPlus1, %n 131 br i1 %cond, label %exit, label %loop 132 133exit: 134 ret void 135} 136 137; Make sure the loop's tail is folded when vectorized under -Os based on its trip-count's 138; not being provably divisible by chosen VF. 139 140define dso_local void @cannotProveAlignedTC(ptr noalias nocapture %A, i32 %p, i32 %q) optsize { 141; CHECK-LABEL: @cannotProveAlignedTC( 142; CHECK-NEXT: entry: 143; CHECK-NEXT: [[AND1:%.*]] = and i32 [[P:%.*]], 3 144; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[AND1]], 0 145; CHECK-NEXT: br i1 [[CMP1]], label [[GUARDED:%.*]], label [[EXIT:%.*]] 146; CHECK: guarded: 147; CHECK-NEXT: [[REM:%.*]] = urem i32 [[Q:%.*]], 3 148; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[REM]], 0 149; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP2]]) 150; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[P]], [[Q]] 151; CHECK-NEXT: [[N:%.*]] = select i1 [[GT]], i32 [[P]], i32 [[Q]] 152; CHECK-NEXT: [[CMP110:%.*]] = icmp sgt i32 [[N]], 0 153; CHECK-NEXT: br i1 [[CMP110]], label [[LOOP_PREHEADER:%.*]], label [[EXIT]] 154; CHECK: loop.preheader: 155; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 156; CHECK: vector.ph: 157; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 3 158; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N_RND_UP]], 4 159; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N_RND_UP]], [[N_MOD_VF]] 160; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i32 [[N]], 1 161; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 162; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer 163; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 164; CHECK: vector.body: 165; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ] 166; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE6]] ] 167; CHECK-NEXT: [[TMP0:%.*]] = icmp ule <4 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] 168; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 169; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 170; CHECK: pred.store.if: 171; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[INDEX]], 0 172; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[TMP2]] 173; CHECK-NEXT: store i32 13, ptr [[TMP3]], align 1 174; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] 175; CHECK: pred.store.continue: 176; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 177; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] 178; CHECK: pred.store.if1: 179; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 1 180; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP5]] 181; CHECK-NEXT: store i32 13, ptr [[TMP6]], align 1 182; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] 183; CHECK: pred.store.continue2: 184; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 185; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] 186; CHECK: pred.store.if3: 187; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[INDEX]], 2 188; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP8]] 189; CHECK-NEXT: store i32 13, ptr [[TMP9]], align 1 190; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]] 191; CHECK: pred.store.continue4: 192; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 193; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] 194; CHECK: pred.store.if5: 195; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[INDEX]], 3 196; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP11]] 197; CHECK-NEXT: store i32 13, ptr [[TMP12]], align 1 198; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]] 199; CHECK: pred.store.continue6: 200; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4 201; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4) 202; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 203; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] 204; CHECK: middle.block: 205; CHECK-NEXT: br i1 true, label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 206; CHECK: scalar.ph: 207; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 208; CHECK-NEXT: br label [[LOOP:%.*]] 209; CHECK: loop: 210; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[RIVPLUS1:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 211; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[RIV]] 212; CHECK-NEXT: store i32 13, ptr [[ARRAYIDX]], align 1 213; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1 214; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], [[N]] 215; CHECK-NEXT: br i1 [[COND]], label [[EXIT_LOOPEXIT]], label [[LOOP]], !llvm.loop [[LOOP7:![0-9]+]] 216; CHECK: exit.loopexit: 217; CHECK-NEXT: br label [[EXIT]] 218; CHECK: exit: 219; CHECK-NEXT: ret void 220; 221entry: 222 %and1 = and i32 %p, 3 223 %cmp1 = icmp eq i32 %and1, 0 224 br i1 %cmp1, label %guarded, label %exit 225 226guarded: 227 %rem = urem i32 %q, 3 228 %cmp2 = icmp eq i32 %rem, 0 229 tail call void @llvm.assume(i1 %cmp2) 230 %gt = icmp sgt i32 %p, %q 231 %n = select i1 %gt, i32 %p, i32 %q 232 %cmp110 = icmp sgt i32 %n, 0 233 br i1 %cmp110, label %loop, label %exit 234 235loop: 236 %riv = phi i32 [ 0, %guarded ], [ %rivPlus1, %loop ] 237 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %riv 238 store i32 13, ptr %arrayidx, align 1 239 %rivPlus1 = add nuw nsw i32 %riv, 1 240 %cond = icmp eq i32 %rivPlus1, %n 241 br i1 %cond, label %exit, label %loop 242 243exit: 244 ret void 245} 246 247declare void @llvm.assume(i1 noundef) nofree nosync nounwind willreturn 248