xref: /llvm-project/llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll (revision 1de3dc7d23dd6b856efad3a3a04f2396328726d7)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2; RUN: opt -p loop-vectorize -S %s | FileCheck %s
3
4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
5target triple = "x86_64-unknown-linux-gnu"
6
7; Test for https://github.com/llvm/llvm-project/issues/111040
8define void @smax_call_uniform(ptr %dst, i64 %x) {
9; CHECK-LABEL: define void @smax_call_uniform(
10; CHECK-SAME: ptr [[DST:%.*]], i64 [[X:%.*]]) {
11; CHECK-NEXT:  [[ENTRY:.*]]:
12; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 -68, -69
13; CHECK-NEXT:    [[MUL:%.*]] = mul nuw nsw i64 [[X]], 0
14; CHECK-NEXT:    br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
15; CHECK:       [[VECTOR_PH]]:
16; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i1> poison, i1 [[C]], i64 0
17; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i1> [[BROADCAST_SPLATINSERT]], <2 x i1> poison, <2 x i32> zeroinitializer
18; CHECK-NEXT:    [[TMP1:%.*]] = xor <2 x i1> [[BROADCAST_SPLAT]], splat (i1 true)
19; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
20; CHECK:       [[VECTOR_BODY]]:
21; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_UREM_CONTINUE6:.*]] ]
22; CHECK-NEXT:    [[TMP2:%.*]] = extractelement <2 x i1> [[TMP1]], i32 0
23; CHECK-NEXT:    br i1 [[TMP2]], label %[[PRED_UREM_IF:.*]], label %[[PRED_UREM_CONTINUE:.*]]
24; CHECK:       [[PRED_UREM_IF]]:
25; CHECK-NEXT:    [[REM:%.*]] = urem i64 [[MUL]], [[X]]
26; CHECK-NEXT:    br label %[[PRED_UREM_CONTINUE]]
27; CHECK:       [[PRED_UREM_CONTINUE]]:
28; CHECK-NEXT:    [[TMP4:%.*]] = phi i64 [ poison, %[[VECTOR_BODY]] ], [ [[REM]], %[[PRED_UREM_IF]] ]
29; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <2 x i1> [[TMP1]], i32 1
30; CHECK-NEXT:    br i1 [[TMP5]], label %[[PRED_UREM_IF1:.*]], label %[[PRED_UREM_CONTINUE2:.*]]
31; CHECK:       [[PRED_UREM_IF1]]:
32; CHECK-NEXT:    [[TMP6:%.*]] = urem i64 [[MUL]], [[X]]
33; CHECK-NEXT:    br label %[[PRED_UREM_CONTINUE2]]
34; CHECK:       [[PRED_UREM_CONTINUE2]]:
35; CHECK-NEXT:    [[TMP7:%.*]] = extractelement <2 x i1> [[TMP1]], i32 0
36; CHECK-NEXT:    br i1 [[TMP7]], label %[[PRED_UREM_IF3:.*]], label %[[PRED_UREM_CONTINUE4:.*]]
37; CHECK:       [[PRED_UREM_IF3]]:
38; CHECK-NEXT:    [[TMP8:%.*]] = urem i64 [[MUL]], [[X]]
39; CHECK-NEXT:    br label %[[PRED_UREM_CONTINUE4]]
40; CHECK:       [[PRED_UREM_CONTINUE4]]:
41; CHECK-NEXT:    [[TMP9:%.*]] = phi i64 [ poison, %[[PRED_UREM_CONTINUE2]] ], [ [[TMP8]], %[[PRED_UREM_IF3]] ]
42; CHECK-NEXT:    [[TMP10:%.*]] = extractelement <2 x i1> [[TMP1]], i32 1
43; CHECK-NEXT:    br i1 [[TMP10]], label %[[PRED_UREM_IF5:.*]], label %[[PRED_UREM_CONTINUE6]]
44; CHECK:       [[PRED_UREM_IF5]]:
45; CHECK-NEXT:    [[TMP11:%.*]] = urem i64 [[MUL]], [[X]]
46; CHECK-NEXT:    br label %[[PRED_UREM_CONTINUE6]]
47; CHECK:       [[PRED_UREM_CONTINUE6]]:
48; CHECK-NEXT:    [[TMP12:%.*]] = tail call i64 @llvm.smax.i64(i64 [[TMP4]], i64 0)
49; CHECK-NEXT:    [[TMP13:%.*]] = tail call i64 @llvm.smax.i64(i64 [[TMP9]], i64 0)
50; CHECK-NEXT:    [[TMP14:%.*]] = extractelement <2 x i1> [[TMP1]], i32 0
51; CHECK-NEXT:    [[P:%.*]] = select i1 [[TMP14]], i64 [[TMP12]], i64 1
52; CHECK-NEXT:    [[TMP15:%.*]] = extractelement <2 x i1> [[TMP1]], i32 0
53; CHECK-NEXT:    [[PREDPHI7:%.*]] = select i1 [[TMP15]], i64 [[TMP13]], i64 1
54; CHECK-NEXT:    [[ADD:%.*]] = add i64 [[P]], 1
55; CHECK-NEXT:    [[TMP17:%.*]] = add i64 [[PREDPHI7]], 1
56; CHECK-NEXT:    [[GEP:%.*]] = getelementptr i64, ptr [[DST]], i64 [[ADD]]
57; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr i64, ptr [[DST]], i64 [[TMP17]]
58; CHECK-NEXT:    store i64 0, ptr [[GEP]], align 8
59; CHECK-NEXT:    store i64 0, ptr [[TMP19]], align 8
60; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
61; CHECK-NEXT:    [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
62; CHECK-NEXT:    br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
63; CHECK:       [[MIDDLE_BLOCK]]:
64; CHECK-NEXT:    br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
65; CHECK:       [[SCALAR_PH]]:
66; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ 1024, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
67; CHECK-NEXT:    br label %[[LOOP_HEADER:.*]]
68; CHECK:       [[LOOP_HEADER]]:
69; CHECK-NEXT:    [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT1:%.*]], %[[LOOP_LATCH:.*]] ]
70; CHECK-NEXT:    br i1 [[C]], label %[[LOOP_LATCH]], label %[[ELSE:.*]]
71; CHECK:       [[ELSE]]:
72; CHECK-NEXT:    [[REM1:%.*]] = urem i64 [[MUL]], [[X]]
73; CHECK-NEXT:    [[SMAX:%.*]] = tail call i64 @llvm.smax.i64(i64 [[REM1]], i64 0)
74; CHECK-NEXT:    br label %[[LOOP_LATCH]]
75; CHECK:       [[LOOP_LATCH]]:
76; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 1, %[[LOOP_HEADER]] ], [ [[SMAX]], %[[ELSE]] ]
77; CHECK-NEXT:    [[IV_NEXT:%.*]] = add i64 [[IV]], 1
78; CHECK-NEXT:    [[GEP1:%.*]] = getelementptr i64, ptr [[DST]], i64 [[IV_NEXT]]
79; CHECK-NEXT:    store i64 0, ptr [[GEP1]], align 8
80; CHECK-NEXT:    [[IV_NEXT1]] = add i64 [[IV1]], 1
81; CHECK-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV_NEXT1]], 1024
82; CHECK-NEXT:    br i1 [[EC]], label %[[EXIT]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]
83; CHECK:       [[EXIT]]:
84; CHECK-NEXT:    ret void
85;
86entry:
87  %c = icmp ult i8 -68, -69
88  %mul = mul nsw nuw i64 %x, 0
89  br label %loop.header
90
91loop.header:
92  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
93  br i1 %c, label %loop.latch, label %else
94
95else:
96  %rem = urem i64 %mul, %x
97  %smax = tail call i64 @llvm.smax.i64(i64 %rem, i64 0)
98  br label %loop.latch
99
100loop.latch:
101  %p = phi i64 [ 1, %loop.header ], [ %smax, %else ]
102  %add = add i64 %p, 1
103  %gep = getelementptr i64, ptr %dst, i64 %add
104  store i64 0, ptr %gep, align 8
105  %iv.next = add i64 %iv, 1
106  %ec = icmp eq i64 %iv.next, 1024
107  br i1 %ec, label %exit, label %loop.header
108
109exit:
110  ret void
111}
112
113declare i64 @llvm.smax.i64(i64, i64)
114;.
115; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
116; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
117; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
118; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
119;.
120