1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes=loop-vectorize < %s | FileCheck %s 3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 5target triple = "x86_64-unknown-linux-gnu" 6 7define float @reduction_sum_float_ieee(i32 %n, ptr %array) { 8; CHECK-LABEL: @reduction_sum_float_ieee( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ne i32 0, 4096 11; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LOOP_EXIT:%.*]] 12; CHECK: loop.preheader: 13; CHECK-NEXT: br label [[LOOP:%.*]] 14; CHECK: loop: 15; CHECK-NEXT: [[IDX:%.*]] = phi i32 [ [[IDX_INC:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ] 16; CHECK-NEXT: [[SUM:%.*]] = phi float [ [[SUM_INC:%.*]], [[LOOP]] ], [ 0.000000e+00, [[LOOP_PREHEADER]] ] 17; CHECK-NEXT: [[ADDRESS:%.*]] = getelementptr float, ptr [[ARRAY:%.*]], i32 [[IDX]] 18; CHECK-NEXT: [[VALUE:%.*]] = load float, ptr [[ADDRESS]], align 4 19; CHECK-NEXT: [[SUM_INC]] = fadd float [[SUM]], [[VALUE]] 20; CHECK-NEXT: [[IDX_INC]] = add i32 [[IDX]], 1 21; CHECK-NEXT: [[BE_COND:%.*]] = icmp ne i32 [[IDX_INC]], 4096 22; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LOOP_EXIT_LOOPEXIT:%.*]] 23; CHECK: loop.exit.loopexit: 24; CHECK-NEXT: [[SUM_INC_LCSSA:%.*]] = phi float [ [[SUM_INC]], [[LOOP]] ] 25; CHECK-NEXT: br label [[LOOP_EXIT]] 26; CHECK: loop.exit: 27; CHECK-NEXT: [[SUM_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[SUM_INC_LCSSA]], [[LOOP_EXIT_LOOPEXIT]] ] 28; CHECK-NEXT: ret float [[SUM_LCSSA]] 29; 30entry: 31 %entry.cond = icmp ne i32 0, 4096 32 br i1 %entry.cond, label %loop, label %loop.exit 33 34loop: 35 %idx = phi i32 [ 0, %entry ], [ %idx.inc, %loop ] 36 %sum = phi float [ 0.000000e+00, %entry ], [ %sum.inc, %loop ] 37 %address = getelementptr float, ptr %array, i32 %idx 38 %value = load float, ptr %address 39 %sum.inc = fadd float %sum, %value 40 %idx.inc = add i32 %idx, 1 41 %be.cond = icmp ne i32 %idx.inc, 4096 42 br i1 %be.cond, label %loop, label %loop.exit 43 44loop.exit: 45 %sum.lcssa = phi float [ %sum.inc, %loop ], [ 0.000000e+00, %entry ] 46 ret float %sum.lcssa 47} 48 49define float @reduction_sum_float_fastmath(i32 %n, ptr %array) { 50; CHECK-LABEL: @reduction_sum_float_fastmath( 51; CHECK-NEXT: entry: 52; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ne i32 0, 4096 53; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LOOP_EXIT:%.*]] 54; CHECK: loop.preheader: 55; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 56; CHECK: vector.ph: 57; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 58; CHECK: vector.body: 59; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 60; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ] 61; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ] 62; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 63; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr [[ARRAY:%.*]], i32 [[TMP0]] 64; CHECK-NEXT: [[TMP4:%.*]] = getelementptr float, ptr [[TMP2]], i32 0 65; CHECK-NEXT: [[TMP5:%.*]] = getelementptr float, ptr [[TMP2]], i32 4 66; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP4]], align 4 67; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, ptr [[TMP5]], align 4 68; CHECK-NEXT: [[TMP6]] = fadd fast <4 x float> [[VEC_PHI]], [[WIDE_LOAD]] 69; CHECK-NEXT: [[TMP7]] = fadd fast <4 x float> [[VEC_PHI1]], [[WIDE_LOAD2]] 70; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 71; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], 4096 72; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 73; CHECK: middle.block: 74; CHECK-NEXT: [[BIN_RDX:%.*]] = fadd fast <4 x float> [[TMP7]], [[TMP6]] 75; CHECK-NEXT: [[TMP9:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> [[BIN_RDX]]) 76; CHECK-NEXT: br i1 true, label [[LOOP_EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 77; CHECK: scalar.ph: 78; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 4096, [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 79; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP9]], [[MIDDLE_BLOCK]] ], [ 0.000000e+00, [[LOOP_PREHEADER]] ] 80; CHECK-NEXT: br label [[LOOP:%.*]] 81; CHECK: loop: 82; CHECK-NEXT: [[IDX:%.*]] = phi i32 [ [[IDX_INC:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 83; CHECK-NEXT: [[SUM:%.*]] = phi float [ [[SUM_INC:%.*]], [[LOOP]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 84; CHECK-NEXT: [[ADDRESS:%.*]] = getelementptr float, ptr [[ARRAY]], i32 [[IDX]] 85; CHECK-NEXT: [[VALUE:%.*]] = load float, ptr [[ADDRESS]], align 4 86; CHECK-NEXT: [[SUM_INC]] = fadd fast float [[SUM]], [[VALUE]] 87; CHECK-NEXT: [[IDX_INC]] = add i32 [[IDX]], 1 88; CHECK-NEXT: [[BE_COND:%.*]] = icmp ne i32 [[IDX_INC]], 4096 89; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LOOP_EXIT_LOOPEXIT]], !llvm.loop [[LOOP3:![0-9]+]] 90; CHECK: loop.exit.loopexit: 91; CHECK-NEXT: [[SUM_INC_LCSSA:%.*]] = phi float [ [[SUM_INC]], [[LOOP]] ], [ [[TMP9]], [[MIDDLE_BLOCK]] ] 92; CHECK-NEXT: br label [[LOOP_EXIT]] 93; CHECK: loop.exit: 94; CHECK-NEXT: [[SUM_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[SUM_INC_LCSSA]], [[LOOP_EXIT_LOOPEXIT]] ] 95; CHECK-NEXT: ret float [[SUM_LCSSA]] 96; 97entry: 98 %entry.cond = icmp ne i32 0, 4096 99 br i1 %entry.cond, label %loop, label %loop.exit 100 101loop: 102 %idx = phi i32 [ 0, %entry ], [ %idx.inc, %loop ] 103 %sum = phi float [ 0.000000e+00, %entry ], [ %sum.inc, %loop ] 104 %address = getelementptr float, ptr %array, i32 %idx 105 %value = load float, ptr %address 106 %sum.inc = fadd fast float %sum, %value 107 %idx.inc = add i32 %idx, 1 108 %be.cond = icmp ne i32 %idx.inc, 4096 109 br i1 %be.cond, label %loop, label %loop.exit 110 111loop.exit: 112 %sum.lcssa = phi float [ %sum.inc, %loop ], [ 0.000000e+00, %entry ] 113 ret float %sum.lcssa 114} 115 116define float @reduction_sum_float_only_reassoc(i32 %n, ptr %array) { 117; CHECK-LABEL: @reduction_sum_float_only_reassoc( 118; CHECK-NEXT: entry: 119; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ne i32 0, 4096 120; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LOOP_EXIT:%.*]] 121; CHECK: loop.preheader: 122; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 123; CHECK: vector.ph: 124; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 125; CHECK: vector.body: 126; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 127; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -0.000000e+00), [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ] 128; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ splat (float -0.000000e+00), [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ] 129; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 130; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr [[ARRAY:%.*]], i32 [[TMP0]] 131; CHECK-NEXT: [[TMP4:%.*]] = getelementptr float, ptr [[TMP2]], i32 0 132; CHECK-NEXT: [[TMP5:%.*]] = getelementptr float, ptr [[TMP2]], i32 4 133; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP4]], align 4 134; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, ptr [[TMP5]], align 4 135; CHECK-NEXT: [[TMP6]] = fadd reassoc <4 x float> [[VEC_PHI]], [[WIDE_LOAD]] 136; CHECK-NEXT: [[TMP7]] = fadd reassoc <4 x float> [[VEC_PHI1]], [[WIDE_LOAD2]] 137; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 138; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], 4096 139; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 140; CHECK: middle.block: 141; CHECK-NEXT: [[BIN_RDX:%.*]] = fadd reassoc <4 x float> [[TMP7]], [[TMP6]] 142; CHECK-NEXT: [[TMP9:%.*]] = call reassoc float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[BIN_RDX]]) 143; CHECK-NEXT: br i1 true, label [[LOOP_EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 144; CHECK: scalar.ph: 145; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 4096, [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 146; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP9]], [[MIDDLE_BLOCK]] ], [ -0.000000e+00, [[LOOP_PREHEADER]] ] 147; CHECK-NEXT: br label [[LOOP:%.*]] 148; CHECK: loop: 149; CHECK-NEXT: [[IDX:%.*]] = phi i32 [ [[IDX_INC:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 150; CHECK-NEXT: [[SUM:%.*]] = phi float [ [[SUM_INC:%.*]], [[LOOP]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 151; CHECK-NEXT: [[ADDRESS:%.*]] = getelementptr float, ptr [[ARRAY]], i32 [[IDX]] 152; CHECK-NEXT: [[VALUE:%.*]] = load float, ptr [[ADDRESS]], align 4 153; CHECK-NEXT: [[SUM_INC]] = fadd reassoc float [[SUM]], [[VALUE]] 154; CHECK-NEXT: [[IDX_INC]] = add i32 [[IDX]], 1 155; CHECK-NEXT: [[BE_COND:%.*]] = icmp ne i32 [[IDX_INC]], 4096 156; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LOOP_EXIT_LOOPEXIT]], !llvm.loop [[LOOP5:![0-9]+]] 157; CHECK: loop.exit.loopexit: 158; CHECK-NEXT: [[SUM_INC_LCSSA:%.*]] = phi float [ [[SUM_INC]], [[LOOP]] ], [ [[TMP9]], [[MIDDLE_BLOCK]] ] 159; CHECK-NEXT: br label [[LOOP_EXIT]] 160; CHECK: loop.exit: 161; CHECK-NEXT: [[SUM_LCSSA:%.*]] = phi float [ -0.000000e+00, [[ENTRY:%.*]] ], [ [[SUM_INC_LCSSA]], [[LOOP_EXIT_LOOPEXIT]] ] 162; CHECK-NEXT: ret float [[SUM_LCSSA]] 163; 164entry: 165 %entry.cond = icmp ne i32 0, 4096 166 br i1 %entry.cond, label %loop, label %loop.exit 167 168loop: 169 %idx = phi i32 [ 0, %entry ], [ %idx.inc, %loop ] 170 %sum = phi float [ -0.000000e+00, %entry ], [ %sum.inc, %loop ] 171 %address = getelementptr float, ptr %array, i32 %idx 172 %value = load float, ptr %address 173 %sum.inc = fadd reassoc float %sum, %value 174 %idx.inc = add i32 %idx, 1 175 %be.cond = icmp ne i32 %idx.inc, 4096 176 br i1 %be.cond, label %loop, label %loop.exit 177 178loop.exit: 179 %sum.lcssa = phi float [ %sum.inc, %loop ], [ -0.000000e+00, %entry ] 180 ret float %sum.lcssa 181} 182 183define float @reduction_sum_float_only_reassoc_and_contract(i32 %n, ptr %array) { 184; CHECK-LABEL: @reduction_sum_float_only_reassoc_and_contract( 185; CHECK-NEXT: entry: 186; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ne i32 0, 4096 187; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LOOP_EXIT:%.*]] 188; CHECK: loop.preheader: 189; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 190; CHECK: vector.ph: 191; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 192; CHECK: vector.body: 193; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 194; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -0.000000e+00), [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ] 195; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ splat (float -0.000000e+00), [[VECTOR_PH]] ], [ [[TMP7:%.*]], [[VECTOR_BODY]] ] 196; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 197; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr [[ARRAY:%.*]], i32 [[TMP0]] 198; CHECK-NEXT: [[TMP4:%.*]] = getelementptr float, ptr [[TMP2]], i32 0 199; CHECK-NEXT: [[TMP5:%.*]] = getelementptr float, ptr [[TMP2]], i32 4 200; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP4]], align 4 201; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, ptr [[TMP5]], align 4 202; CHECK-NEXT: [[TMP6]] = fadd reassoc contract <4 x float> [[VEC_PHI]], [[WIDE_LOAD]] 203; CHECK-NEXT: [[TMP7]] = fadd reassoc contract <4 x float> [[VEC_PHI1]], [[WIDE_LOAD2]] 204; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 205; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], 4096 206; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] 207; CHECK: middle.block: 208; CHECK-NEXT: [[BIN_RDX:%.*]] = fadd reassoc contract <4 x float> [[TMP7]], [[TMP6]] 209; CHECK-NEXT: [[TMP9:%.*]] = call reassoc contract float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[BIN_RDX]]) 210; CHECK-NEXT: br i1 true, label [[LOOP_EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 211; CHECK: scalar.ph: 212; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 4096, [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 213; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP9]], [[MIDDLE_BLOCK]] ], [ -0.000000e+00, [[LOOP_PREHEADER]] ] 214; CHECK-NEXT: br label [[LOOP:%.*]] 215; CHECK: loop: 216; CHECK-NEXT: [[IDX:%.*]] = phi i32 [ [[IDX_INC:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 217; CHECK-NEXT: [[SUM:%.*]] = phi float [ [[SUM_INC:%.*]], [[LOOP]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 218; CHECK-NEXT: [[ADDRESS:%.*]] = getelementptr float, ptr [[ARRAY]], i32 [[IDX]] 219; CHECK-NEXT: [[VALUE:%.*]] = load float, ptr [[ADDRESS]], align 4 220; CHECK-NEXT: [[SUM_INC]] = fadd reassoc contract float [[SUM]], [[VALUE]] 221; CHECK-NEXT: [[IDX_INC]] = add i32 [[IDX]], 1 222; CHECK-NEXT: [[BE_COND:%.*]] = icmp ne i32 [[IDX_INC]], 4096 223; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LOOP_EXIT_LOOPEXIT]], !llvm.loop [[LOOP7:![0-9]+]] 224; CHECK: loop.exit.loopexit: 225; CHECK-NEXT: [[SUM_INC_LCSSA:%.*]] = phi float [ [[SUM_INC]], [[LOOP]] ], [ [[TMP9]], [[MIDDLE_BLOCK]] ] 226; CHECK-NEXT: br label [[LOOP_EXIT]] 227; CHECK: loop.exit: 228; CHECK-NEXT: [[SUM_LCSSA:%.*]] = phi float [ -0.000000e+00, [[ENTRY:%.*]] ], [ [[SUM_INC_LCSSA]], [[LOOP_EXIT_LOOPEXIT]] ] 229; CHECK-NEXT: ret float [[SUM_LCSSA]] 230; 231entry: 232 %entry.cond = icmp ne i32 0, 4096 233 br i1 %entry.cond, label %loop, label %loop.exit 234 235loop: 236 %idx = phi i32 [ 0, %entry ], [ %idx.inc, %loop ] 237 %sum = phi float [ -0.000000e+00, %entry ], [ %sum.inc, %loop ] 238 %address = getelementptr float, ptr %array, i32 %idx 239 %value = load float, ptr %address 240 %sum.inc = fadd reassoc contract float %sum, %value 241 %idx.inc = add i32 %idx, 1 242 %be.cond = icmp ne i32 %idx.inc, 4096 243 br i1 %be.cond, label %loop, label %loop.exit 244 245loop.exit: 246 %sum.lcssa = phi float [ %sum.inc, %loop ], [ -0.000000e+00, %entry ] 247 ret float %sum.lcssa 248} 249 250; New instructions should have the same FMF as the original code. 251; Note that the select inherits FMF from its fcmp condition. 252 253define float @PR35538(ptr nocapture readonly %a, i32 %N) #0 { 254; CHECK-LABEL: @PR35538( 255; CHECK-NEXT: entry: 256; CHECK-NEXT: [[CMP12:%.*]] = icmp sgt i32 [[N:%.*]], 0 257; CHECK-NEXT: br i1 [[CMP12]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]] 258; CHECK: for.body.lr.ph: 259; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 260; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[WIDE_TRIP_COUNT]], 8 261; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 262; CHECK: vector.ph: 263; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[WIDE_TRIP_COUNT]], 8 264; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[WIDE_TRIP_COUNT]], [[N_MOD_VF]] 265; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 266; CHECK: vector.body: 267; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 268; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -1.000000e+00), [[VECTOR_PH]] ], [ [[TMP8:%.*]], [[VECTOR_BODY]] ] 269; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ splat (float -1.000000e+00), [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ] 270; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 271; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[TMP0]] 272; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[TMP2]], i32 0 273; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[TMP2]], i32 4 274; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP4]], align 4 275; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, ptr [[TMP5]], align 4 276; CHECK-NEXT: [[TMP6:%.*]] = fcmp nnan ninf nsz oge <4 x float> [[WIDE_LOAD]], [[VEC_PHI]] 277; CHECK-NEXT: [[TMP7:%.*]] = fcmp nnan ninf nsz oge <4 x float> [[WIDE_LOAD2]], [[VEC_PHI1]] 278; CHECK-NEXT: [[TMP8]] = select <4 x i1> [[TMP6]], <4 x float> [[WIDE_LOAD]], <4 x float> [[VEC_PHI]] 279; CHECK-NEXT: [[TMP9]] = select <4 x i1> [[TMP7]], <4 x float> [[WIDE_LOAD2]], <4 x float> [[VEC_PHI1]] 280; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 281; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 282; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] 283; CHECK: middle.block: 284; CHECK-NEXT: [[RDX_MINMAX_CMP:%.*]] = fcmp nnan ninf nsz ogt <4 x float> [[TMP8]], [[TMP9]] 285; CHECK-NEXT: [[RDX_MINMAX_SELECT:%.*]] = select nnan ninf nsz <4 x i1> [[RDX_MINMAX_CMP]], <4 x float> [[TMP8]], <4 x float> [[TMP9]] 286; CHECK-NEXT: [[TMP11:%.*]] = call nnan ninf nsz float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[RDX_MINMAX_SELECT]]) 287; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[WIDE_TRIP_COUNT]], [[N_VEC]] 288; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]] 289; CHECK: scalar.ph: 290; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_LR_PH]] ] 291; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP11]], [[MIDDLE_BLOCK]] ], [ -1.000000e+00, [[FOR_BODY_LR_PH]] ] 292; CHECK-NEXT: br label [[FOR_BODY:%.*]] 293; CHECK: for.cond.cleanup.loopexit: 294; CHECK-NEXT: [[MAX_0__LCSSA:%.*]] = phi float [ [[MAX_0_:%.*]], [[FOR_BODY]] ], [ [[TMP11]], [[MIDDLE_BLOCK]] ] 295; CHECK-NEXT: br label [[FOR_COND_CLEANUP]] 296; CHECK: for.cond.cleanup: 297; CHECK-NEXT: [[MAX_0_LCSSA:%.*]] = phi float [ -1.000000e+00, [[ENTRY:%.*]] ], [ [[MAX_0__LCSSA]], [[FOR_COND_CLEANUP_LOOPEXIT]] ] 298; CHECK-NEXT: ret float [[MAX_0_LCSSA]] 299; CHECK: for.body: 300; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 301; CHECK-NEXT: [[MAX_013:%.*]] = phi float [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[MAX_0_]], [[FOR_BODY]] ] 302; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] 303; CHECK-NEXT: [[TMP12:%.*]] = load float, ptr [[ARRAYIDX]], align 4 304; CHECK-NEXT: [[CMP1_INV:%.*]] = fcmp nnan ninf nsz oge float [[TMP12]], [[MAX_013]] 305; CHECK-NEXT: [[MAX_0_]] = select i1 [[CMP1_INV]], float [[TMP12]], float [[MAX_013]] 306; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 307; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 308; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] 309; 310entry: 311 %cmp12 = icmp sgt i32 %N, 0 312 br i1 %cmp12, label %for.body.lr.ph, label %for.cond.cleanup 313 314for.body.lr.ph: 315 %wide.trip.count = zext i32 %N to i64 316 br label %for.body 317 318for.cond.cleanup: 319 %max.0.lcssa = phi float [ -1.000000e+00, %entry ], [ %max.0., %for.body ] 320 ret float %max.0.lcssa 321 322for.body: 323 %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] 324 %max.013 = phi float [ -1.000000e+00, %for.body.lr.ph ], [ %max.0., %for.body ] 325 %arrayidx = getelementptr inbounds float, ptr %a, i64 %indvars.iv 326 %0 = load float, ptr %arrayidx, align 4 327 %cmp1.inv = fcmp nnan ninf nsz oge float %0, %max.013 328 %max.0. = select i1 %cmp1.inv, float %0, float %max.013 329 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 330 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count 331 br i1 %exitcond, label %for.cond.cleanup, label %for.body 332} 333 334; Same as above, but this time the select already has matching FMF with its condition. 335 336define float @PR35538_more_FMF(ptr nocapture readonly %a, i32 %N) #0 { 337; CHECK-LABEL: @PR35538_more_FMF( 338; CHECK-NEXT: entry: 339; CHECK-NEXT: [[CMP12:%.*]] = icmp sgt i32 [[N:%.*]], 0 340; CHECK-NEXT: br i1 [[CMP12]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]] 341; CHECK: for.body.lr.ph: 342; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 343; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[WIDE_TRIP_COUNT]], 8 344; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 345; CHECK: vector.ph: 346; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[WIDE_TRIP_COUNT]], 8 347; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[WIDE_TRIP_COUNT]], [[N_MOD_VF]] 348; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 349; CHECK: vector.body: 350; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 351; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ splat (float -1.000000e+00), [[VECTOR_PH]] ], [ [[TMP8:%.*]], [[VECTOR_BODY]] ] 352; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ splat (float -1.000000e+00), [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ] 353; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 354; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[TMP0]] 355; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[TMP2]], i32 0 356; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[TMP2]], i32 4 357; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP4]], align 4 358; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, ptr [[TMP5]], align 4 359; CHECK-NEXT: [[TMP6:%.*]] = fcmp nnan ninf oge <4 x float> [[WIDE_LOAD]], [[VEC_PHI]] 360; CHECK-NEXT: [[TMP7:%.*]] = fcmp nnan ninf oge <4 x float> [[WIDE_LOAD2]], [[VEC_PHI1]] 361; CHECK-NEXT: [[TMP8]] = select nnan ninf <4 x i1> [[TMP6]], <4 x float> [[WIDE_LOAD]], <4 x float> [[VEC_PHI]] 362; CHECK-NEXT: [[TMP9]] = select nnan ninf <4 x i1> [[TMP7]], <4 x float> [[WIDE_LOAD2]], <4 x float> [[VEC_PHI1]] 363; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 364; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 365; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] 366; CHECK: middle.block: 367; CHECK-NEXT: [[RDX_MINMAX_CMP:%.*]] = fcmp nnan ninf ogt <4 x float> [[TMP8]], [[TMP9]] 368; CHECK-NEXT: [[RDX_MINMAX_SELECT:%.*]] = select nnan ninf <4 x i1> [[RDX_MINMAX_CMP]], <4 x float> [[TMP8]], <4 x float> [[TMP9]] 369; CHECK-NEXT: [[TMP11:%.*]] = call nnan ninf float @llvm.vector.reduce.fmax.v4f32(<4 x float> [[RDX_MINMAX_SELECT]]) 370; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[WIDE_TRIP_COUNT]], [[N_VEC]] 371; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]] 372; CHECK: scalar.ph: 373; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_LR_PH]] ] 374; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP11]], [[MIDDLE_BLOCK]] ], [ -1.000000e+00, [[FOR_BODY_LR_PH]] ] 375; CHECK-NEXT: br label [[FOR_BODY:%.*]] 376; CHECK: for.cond.cleanup.loopexit: 377; CHECK-NEXT: [[MAX_0__LCSSA:%.*]] = phi float [ [[MAX_0_:%.*]], [[FOR_BODY]] ], [ [[TMP11]], [[MIDDLE_BLOCK]] ] 378; CHECK-NEXT: br label [[FOR_COND_CLEANUP]] 379; CHECK: for.cond.cleanup: 380; CHECK-NEXT: [[MAX_0_LCSSA:%.*]] = phi float [ -1.000000e+00, [[ENTRY:%.*]] ], [ [[MAX_0__LCSSA]], [[FOR_COND_CLEANUP_LOOPEXIT]] ] 381; CHECK-NEXT: ret float [[MAX_0_LCSSA]] 382; CHECK: for.body: 383; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 384; CHECK-NEXT: [[MAX_013:%.*]] = phi float [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[MAX_0_]], [[FOR_BODY]] ] 385; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] 386; CHECK-NEXT: [[TMP12:%.*]] = load float, ptr [[ARRAYIDX]], align 4 387; CHECK-NEXT: [[CMP1_INV:%.*]] = fcmp nnan ninf oge float [[TMP12]], [[MAX_013]] 388; CHECK-NEXT: [[MAX_0_]] = select nnan ninf i1 [[CMP1_INV]], float [[TMP12]], float [[MAX_013]] 389; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 390; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 391; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] 392; 393entry: 394 %cmp12 = icmp sgt i32 %N, 0 395 br i1 %cmp12, label %for.body.lr.ph, label %for.cond.cleanup 396 397for.body.lr.ph: 398 %wide.trip.count = zext i32 %N to i64 399 br label %for.body 400 401for.cond.cleanup: 402 %max.0.lcssa = phi float [ -1.000000e+00, %entry ], [ %max.0., %for.body ] 403 ret float %max.0.lcssa 404 405for.body: 406 %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] 407 %max.013 = phi float [ -1.000000e+00, %for.body.lr.ph ], [ %max.0., %for.body ] 408 %arrayidx = getelementptr inbounds float, ptr %a, i64 %indvars.iv 409 %0 = load float, ptr %arrayidx, align 4 410 %cmp1.inv = fcmp nnan ninf oge float %0, %max.013 411 %max.0. = select nnan ninf i1 %cmp1.inv, float %0, float %max.013 412 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 413 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count 414 br i1 %exitcond, label %for.cond.cleanup, label %for.body 415} 416 417attributes #0 = { "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "unsafe-fp-math"="false" } 418