1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=loop-vectorize --force-vector-width=4 --force-vector-interleave=0 -S -o - < %s | FileCheck %s 3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 5target triple = "x86_64-unknown-linux-gnu" 6 7%0 = type { i32 } 8%1 = type { i64 } 9 10define ptr @foo(ptr %p, ptr %p.last) unnamed_addr #0 { 11; CHECK-LABEL: @foo( 12; CHECK-NEXT: entry: 13; CHECK-NEXT: [[P3:%.*]] = ptrtoint ptr [[P:%.*]] to i64 14; CHECK-NEXT: [[P_LAST1:%.*]] = ptrtoint ptr [[P_LAST:%.*]] to i64 15; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[P_LAST1]], -1024 16; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[P3]] 17; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 10 18; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1 19; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 16 20; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 21; CHECK: vector.ph: 22; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 16 23; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]] 24; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[N_VEC]], 1024 25; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP4]] 26; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 27; CHECK: vector.body: 28; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[P]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ] 29; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 30; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i64> <i64 0, i64 1024, i64 2048, i64 3072> 31; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i64> <i64 12288, i64 13312, i64 14336, i64 15360> 32; CHECK-NEXT: [[WIDE_MASKED_GATHER6:%.*]] = call <4 x ptr> @llvm.masked.gather.v4p0.v4p0(<4 x ptr> [[TMP8]], i32 8, <4 x i1> splat (i1 true), <4 x ptr> poison) 33; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16 34; CHECK-NEXT: [[PTR_IND]] = getelementptr i8, ptr [[POINTER_PHI]], i64 16384 35; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 36; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 37; CHECK: middle.block: 38; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x ptr> [[WIDE_MASKED_GATHER6]], i32 3 39; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]] 40; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 41; CHECK: scalar.ph: 42; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[P]], [[ENTRY:%.*]] ] 43; CHECK-NEXT: br label [[LOOP:%.*]] 44; CHECK: loop: 45; CHECK-NEXT: [[P2:%.*]] = phi ptr [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[P_INC:%.*]], [[LOOP]] ] 46; CHECK-NEXT: [[P_INC]] = getelementptr inbounds i64, ptr [[P2]], i64 128 47; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[P2]], align 8 48; CHECK-NEXT: [[B:%.*]] = icmp eq ptr [[P_INC]], [[P_LAST]] 49; CHECK-NEXT: br i1 [[B]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]] 50; CHECK: exit: 51; CHECK-NEXT: [[V_LCSSA:%.*]] = phi ptr [ [[V]], [[LOOP]] ], [ [[TMP10]], [[MIDDLE_BLOCK]] ] 52; CHECK-NEXT: ret ptr [[V_LCSSA]] 53; 54entry: 55 br label %loop 56 57loop: 58 %p2 = phi ptr [ %p, %entry ], [ %p.inc, %loop ] 59 %p.inc = getelementptr inbounds i64, ptr %p2, i64 128 60 %v = load ptr, ptr %p2, align 8 61 %b = icmp eq ptr %p.inc, %p.last 62 br i1 %b, label %exit, label %loop 63 64exit: 65 ret ptr %v 66} 67 68define ptr @bar(ptr %p, ptr %p.last) unnamed_addr #0 { 69; CHECK-LABEL: @bar( 70; CHECK-NEXT: entry: 71; CHECK-NEXT: [[P3:%.*]] = ptrtoint ptr [[P:%.*]] to i64 72; CHECK-NEXT: [[P_LAST1:%.*]] = ptrtoint ptr [[P_LAST:%.*]] to i64 73; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[P_LAST1]], -1024 74; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[P3]] 75; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 10 76; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1 77; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 16 78; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 79; CHECK: vector.ph: 80; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 16 81; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]] 82; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[N_VEC]], 1024 83; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP4]] 84; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 85; CHECK: vector.body: 86; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[P]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ] 87; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 88; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i64> <i64 0, i64 1024, i64 2048, i64 3072> 89; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i64> <i64 12288, i64 13312, i64 14336, i64 15360> 90; CHECK-NEXT: [[WIDE_MASKED_GATHER6:%.*]] = call <4 x ptr> @llvm.masked.gather.v4p0.v4p0(<4 x ptr> [[TMP8]], i32 8, <4 x i1> splat (i1 true), <4 x ptr> poison) 91; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16 92; CHECK-NEXT: [[PTR_IND]] = getelementptr i8, ptr [[POINTER_PHI]], i64 16384 93; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 94; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 95; CHECK: middle.block: 96; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x ptr> [[WIDE_MASKED_GATHER6]], i32 3 97; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]] 98; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 99; CHECK: scalar.ph: 100; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[P]], [[ENTRY:%.*]] ] 101; CHECK-NEXT: br label [[LOOP:%.*]] 102; CHECK: loop: 103; CHECK-NEXT: [[P2:%.*]] = phi ptr [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[P_INC:%.*]], [[LOOP]] ] 104; CHECK-NEXT: [[P_INC]] = getelementptr inbounds i64, ptr [[P2]], i64 128 105; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[P2]], align 8 106; CHECK-NEXT: [[B:%.*]] = icmp eq ptr [[P_INC]], [[P_LAST]] 107; CHECK-NEXT: br i1 [[B]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]] 108; CHECK: exit: 109; CHECK-NEXT: [[V_LCSSA:%.*]] = phi ptr [ [[V]], [[LOOP]] ], [ [[TMP10]], [[MIDDLE_BLOCK]] ] 110; CHECK-NEXT: ret ptr [[V_LCSSA]] 111; 112entry: 113 br label %loop 114 115loop: 116 %p2 = phi ptr [ %p, %entry ], [ %p.inc, %loop ] 117 %p.inc = getelementptr inbounds i64, ptr %p2, i64 128 118 %v = load ptr, ptr %p2, align 8 119 %b = icmp eq ptr %p.inc, %p.last 120 br i1 %b, label %exit, label %loop 121 122exit: 123 ret ptr %v 124} 125 126attributes #0 = { "target-cpu"="skylake" } 127 128