1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; PR34438 3; Loop has a short trip count of 8 iterations. It should be vectorized because no runtime checks or tail loop are necessary. 4; Two cases tested AVX (MaxVF=8 = TripCount) and AVX512 (MaxVF=16 > TripCount) 5 6; RUN: opt < %s -passes=loop-vectorize -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx -S | FileCheck %s 7; RUN: opt < %s -passes=loop-vectorize -mtriple=x86_64-apple-macosx10.8.0 -mcpu=skylake-avx512 -S | FileCheck %s 8 9target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 10target triple = "x86_64-apple-macosx10.8.0" 11 12define void @small_tc(ptr noalias nocapture %A, ptr noalias nocapture readonly %B) { 13; CHECK-LABEL: @small_tc( 14; CHECK-NEXT: entry: 15; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 16; CHECK: vector.ph: 17; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 18; CHECK: vector.body: 19; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[B:%.*]], i64 0 20; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds float, ptr [[TMP0]], i32 0 21; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP0:![0-9]+]] 22; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 0 23; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, ptr [[TMP2]], i32 0 24; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <8 x float>, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP0]] 25; CHECK-NEXT: [[TMP4:%.*]] = fadd fast <8 x float> [[WIDE_LOAD]], [[WIDE_LOAD1]] 26; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[TMP2]], i32 0 27; CHECK-NEXT: store <8 x float> [[TMP4]], ptr [[TMP5]], align 4, !llvm.access.group [[ACC_GRP0]] 28; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]] 29; CHECK: middle.block: 30; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 31; CHECK: scalar.ph: 32; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 8, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 33; CHECK-NEXT: br label [[FOR_BODY:%.*]] 34; CHECK: for.body: 35; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 36; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDVARS_IV]] 37; CHECK-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP0]] 38; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] 39; CHECK-NEXT: [[TMP7:%.*]] = load float, ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP0]] 40; CHECK-NEXT: [[ADD:%.*]] = fadd fast float [[TMP6]], [[TMP7]] 41; CHECK-NEXT: store float [[ADD]], ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP0]] 42; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 43; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 8 44; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP1:![0-9]+]] 45; CHECK: for.end: 46; CHECK-NEXT: ret void 47; 48entry: 49 br label %for.body 50 51for.body: 52 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 53 %arrayidx = getelementptr inbounds float, ptr %B, i64 %indvars.iv 54 %0 = load float, ptr %arrayidx, align 4, !llvm.access.group !5 55 %arrayidx2 = getelementptr inbounds float, ptr %A, i64 %indvars.iv 56 %1 = load float, ptr %arrayidx2, align 4, !llvm.access.group !5 57 %add = fadd fast float %0, %1 58 store float %add, ptr %arrayidx2, align 4, !llvm.access.group !5 59 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 60 %exitcond = icmp eq i64 %indvars.iv.next, 8 61 br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !4 62 63for.end: 64 ret void 65} 66 67!3 = !{!3, !{!"llvm.loop.parallel_accesses", !5}} 68!4 = !{!4} 69!5 = distinct !{} 70