1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt -S -passes=loop-vectorize -mtriple=s390x-linux-gnu -vectorizer-min-trip-count=8 < %s | FileCheck %s 3 4define i32 @main(i32 %arg, ptr nocapture readnone %arg1) #0 { 5; CHECK-LABEL: define i32 @main( 6; CHECK-SAME: i32 [[ARG:%.*]], ptr readnone captures(none) [[ARG1:%.*]]) #[[ATTR0:[0-9]+]] { 7; CHECK-NEXT: [[ENTRY:.*]]: 8; CHECK-NEXT: [[TMP0:%.*]] = alloca i8, align 1 9; CHECK-NEXT: br label %[[LOOP:.*]] 10; CHECK: [[LOOP]]: 11; CHECK-NEXT: [[STOREMERGE_I_I:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[TMP12_I_I:%.*]], %[[LOOP]] ] 12; CHECK-NEXT: store i8 [[STOREMERGE_I_I]], ptr [[TMP0]], align 2 13; CHECK-NEXT: [[TMP8_I_I:%.*]] = icmp ult i8 [[STOREMERGE_I_I]], 8 14; CHECK-NEXT: [[TMP12_I_I]] = add nuw nsw i8 [[STOREMERGE_I_I]], 1 15; CHECK-NEXT: br i1 [[TMP8_I_I]], label %[[LOOP]], label %[[RET:.*]] 16; CHECK: [[RET]]: 17; CHECK-NEXT: ret i32 0 18; 19entry: 20 %0 = alloca i8, align 1 21 br label %loop 22 23loop: 24 %storemerge.i.i = phi i8 [ 0, %entry ], [ %tmp12.i.i, %loop ] 25 store i8 %storemerge.i.i, ptr %0, align 2 26 %tmp8.i.i = icmp ult i8 %storemerge.i.i, 8 27 %tmp12.i.i = add nuw nsw i8 %storemerge.i.i, 1 28 br i1 %tmp8.i.i, label %loop, label %ret 29 30ret: 31 ret i32 0 32} 33 34attributes #0 = { "target-cpu"="z13" } 35 36