1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt -passes=loop-vectorize -mtriple=s390x -mcpu=z14 -S %s | FileCheck %s 3 4define void @test(ptr %p, i40 %a) { 5; CHECK-LABEL: define void @test( 6; CHECK-SAME: ptr [[P:%.*]], i40 [[A:%.*]]) #[[ATTR0:[0-9]+]] { 7; CHECK-NEXT: entry: 8; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 9; CHECK: vector.ph: 10; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <16 x i40> poison, i40 [[A]], i64 0 11; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <16 x i40> [[BROADCAST_SPLATINSERT1]], <16 x i40> poison, <16 x i32> zeroinitializer 12; CHECK-NEXT: [[TMP1:%.*]] = shl <16 x i40> [[BROADCAST_SPLAT2]], splat (i40 24) 13; CHECK-NEXT: [[TMP2:%.*]] = ashr <16 x i40> [[TMP1]], splat (i40 28) 14; CHECK-NEXT: [[TMP3:%.*]] = trunc <16 x i40> [[TMP2]] to <16 x i32> 15; CHECK-NEXT: [[TMP4:%.*]] = trunc <16 x i32> [[TMP3]] to <16 x i1> 16; CHECK-NEXT: [[TMP5:%.*]] = icmp eq <16 x i1> [[TMP4]], zeroinitializer 17; CHECK-NEXT: [[TMP6:%.*]] = icmp ult <16 x i1> zeroinitializer, [[TMP5]] 18; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i1> [[TMP6]], splat (i1 true) 19; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt <16 x i1> [[TMP7]], zeroinitializer 20; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 21; CHECK: vector.body: 22; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 23; CHECK: pred.store.if: 24; CHECK-NEXT: [[TMP10:%.*]] = extractelement <16 x i1> [[TMP8]], i32 0 25; CHECK-NEXT: store i1 [[TMP10]], ptr [[P]], align 1 26; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] 27; CHECK: pred.store.continue: 28; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] 29; CHECK: pred.store.if1: 30; CHECK-NEXT: [[TMP9:%.*]] = extractelement <16 x i1> [[TMP8]], i32 1 31; CHECK-NEXT: store i1 [[TMP9]], ptr [[P]], align 1 32; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] 33; CHECK: pred.store.continue2: 34; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] 35; CHECK: pred.store.if3: 36; CHECK-NEXT: [[TMP12:%.*]] = extractelement <16 x i1> [[TMP8]], i32 2 37; CHECK-NEXT: store i1 [[TMP12]], ptr [[P]], align 1 38; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]] 39; CHECK: pred.store.continue4: 40; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6:%.*]] 41; CHECK: pred.store.if5: 42; CHECK-NEXT: [[TMP14:%.*]] = extractelement <16 x i1> [[TMP8]], i32 3 43; CHECK-NEXT: store i1 [[TMP14]], ptr [[P]], align 1 44; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]] 45; CHECK: pred.store.continue6: 46; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8:%.*]] 47; CHECK: pred.store.if7: 48; CHECK-NEXT: [[TMP16:%.*]] = extractelement <16 x i1> [[TMP8]], i32 4 49; CHECK-NEXT: store i1 [[TMP16]], ptr [[P]], align 1 50; CHECK-NEXT: br label [[PRED_STORE_CONTINUE8]] 51; CHECK: pred.store.continue8: 52; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF9:%.*]], label [[PRED_STORE_CONTINUE10:%.*]] 53; CHECK: pred.store.if9: 54; CHECK-NEXT: [[TMP18:%.*]] = extractelement <16 x i1> [[TMP8]], i32 5 55; CHECK-NEXT: store i1 [[TMP18]], ptr [[P]], align 1 56; CHECK-NEXT: br label [[PRED_STORE_CONTINUE10]] 57; CHECK: pred.store.continue10: 58; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF11:%.*]], label [[PRED_STORE_CONTINUE12:%.*]] 59; CHECK: pred.store.if11: 60; CHECK-NEXT: [[TMP20:%.*]] = extractelement <16 x i1> [[TMP8]], i32 6 61; CHECK-NEXT: store i1 [[TMP20]], ptr [[P]], align 1 62; CHECK-NEXT: br label [[PRED_STORE_CONTINUE12]] 63; CHECK: pred.store.continue12: 64; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF13:%.*]], label [[PRED_STORE_CONTINUE14:%.*]] 65; CHECK: pred.store.if13: 66; CHECK-NEXT: [[TMP22:%.*]] = extractelement <16 x i1> [[TMP8]], i32 7 67; CHECK-NEXT: store i1 [[TMP22]], ptr [[P]], align 1 68; CHECK-NEXT: br label [[PRED_STORE_CONTINUE14]] 69; CHECK: pred.store.continue14: 70; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF15:%.*]], label [[PRED_STORE_CONTINUE16:%.*]] 71; CHECK: pred.store.if15: 72; CHECK-NEXT: [[TMP24:%.*]] = extractelement <16 x i1> [[TMP8]], i32 8 73; CHECK-NEXT: store i1 [[TMP24]], ptr [[P]], align 1 74; CHECK-NEXT: br label [[PRED_STORE_CONTINUE16]] 75; CHECK: pred.store.continue16: 76; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF17:%.*]], label [[PRED_STORE_CONTINUE18:%.*]] 77; CHECK: pred.store.if17: 78; CHECK-NEXT: [[TMP26:%.*]] = extractelement <16 x i1> [[TMP8]], i32 9 79; CHECK-NEXT: store i1 [[TMP26]], ptr [[P]], align 1 80; CHECK-NEXT: br label [[PRED_STORE_CONTINUE18]] 81; CHECK: pred.store.continue18: 82; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF19:%.*]], label [[PRED_STORE_CONTINUE20:%.*]] 83; CHECK: pred.store.if19: 84; CHECK-NEXT: [[TMP28:%.*]] = extractelement <16 x i1> [[TMP8]], i32 10 85; CHECK-NEXT: store i1 [[TMP28]], ptr [[P]], align 1 86; CHECK-NEXT: br label [[PRED_STORE_CONTINUE20]] 87; CHECK: pred.store.continue20: 88; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF21:%.*]], label [[PRED_STORE_CONTINUE22:%.*]] 89; CHECK: pred.store.if21: 90; CHECK-NEXT: [[TMP30:%.*]] = extractelement <16 x i1> [[TMP8]], i32 11 91; CHECK-NEXT: store i1 [[TMP30]], ptr [[P]], align 1 92; CHECK-NEXT: br label [[PRED_STORE_CONTINUE22]] 93; CHECK: pred.store.continue22: 94; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF23:%.*]], label [[PRED_STORE_CONTINUE24:%.*]] 95; CHECK: pred.store.if23: 96; CHECK-NEXT: [[TMP32:%.*]] = extractelement <16 x i1> [[TMP8]], i32 12 97; CHECK-NEXT: store i1 [[TMP32]], ptr [[P]], align 1 98; CHECK-NEXT: br label [[PRED_STORE_CONTINUE24]] 99; CHECK: pred.store.continue24: 100; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF25:%.*]], label [[PRED_STORE_CONTINUE26:%.*]] 101; CHECK: pred.store.if25: 102; CHECK-NEXT: [[TMP34:%.*]] = extractelement <16 x i1> [[TMP8]], i32 13 103; CHECK-NEXT: store i1 [[TMP34]], ptr [[P]], align 1 104; CHECK-NEXT: br label [[PRED_STORE_CONTINUE26]] 105; CHECK: pred.store.continue26: 106; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF27:%.*]], label [[PRED_STORE_CONTINUE28:%.*]] 107; CHECK: pred.store.if27: 108; CHECK-NEXT: [[TMP36:%.*]] = extractelement <16 x i1> [[TMP8]], i32 14 109; CHECK-NEXT: store i1 [[TMP36]], ptr [[P]], align 1 110; CHECK-NEXT: br label [[PRED_STORE_CONTINUE28]] 111; CHECK: pred.store.continue28: 112; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF29:%.*]], label [[PRED_STORE_CONTINUE30:%.*]] 113; CHECK: pred.store.if29: 114; CHECK-NEXT: [[TMP38:%.*]] = extractelement <16 x i1> [[TMP8]], i32 15 115; CHECK-NEXT: store i1 [[TMP38]], ptr [[P]], align 1 116; CHECK-NEXT: br label [[PRED_STORE_CONTINUE30]] 117; CHECK: pred.store.continue30: 118; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]] 119; CHECK: middle.block: 120; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 121; CHECK: scalar.ph: 122; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 16, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 123; CHECK-NEXT: br label [[FOR_BODY:%.*]] 124; CHECK: for.body: 125; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ] 126; CHECK-NEXT: [[SHL:%.*]] = shl i40 [[A]], 24 127; CHECK-NEXT: [[ASHR:%.*]] = ashr i40 [[SHL]], 28 128; CHECK-NEXT: [[TRUNC:%.*]] = trunc i40 [[ASHR]] to i32 129; CHECK-NEXT: [[ICMP_EQ:%.*]] = icmp eq i32 [[TRUNC]], 0 130; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[ICMP_EQ]] to i32 131; CHECK-NEXT: [[ICMP_ULT:%.*]] = icmp ult i32 0, [[ZEXT]] 132; CHECK-NEXT: [[OR:%.*]] = or i1 [[ICMP_ULT]], true 133; CHECK-NEXT: [[ICMP_SGT:%.*]] = icmp sgt i1 [[OR]], false 134; CHECK-NEXT: store i1 [[ICMP_SGT]], ptr [[P]], align 1 135; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 136; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[IV_NEXT]], 10 137; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[EXIT]], !llvm.loop [[LOOP0:![0-9]+]] 138; CHECK: exit: 139; CHECK-NEXT: ret void 140; 141entry: 142 br label %for.body 143 144for.body: ; preds = %for.body, %entry 145 %iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ] 146 %shl = shl i40 %a, 24 147 %ashr = ashr i40 %shl, 28 148 %trunc = trunc i40 %ashr to i32 149 %icmp.eq = icmp eq i32 %trunc, 0 150 %zext = zext i1 %icmp.eq to i32 151 %icmp.ult = icmp ult i32 0, %zext 152 %or = or i1 %icmp.ult, true 153 %icmp.sgt = icmp sgt i1 %or, false 154 store i1 %icmp.sgt, ptr %p, align 1 155 %iv.next = add i32 %iv, 1 156 %cond = icmp ult i32 %iv.next, 10 157 br i1 %cond, label %for.body, label %exit 158 159exit: ; preds = %for.body 160 ret void 161} 162;. 163; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} 164; CHECK: [[META1]] = !{!"llvm.loop.unroll.runtime.disable"} 165; CHECK: [[META2]] = !{!"llvm.loop.isvectorized", i32 1} 166;. 167