1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=loop-vectorize \ 3; RUN: -force-ordered-reductions=true -hints-allow-reordering=false \ 4; RUN: -force-tail-folding-style=data-with-evl \ 5; RUN: -prefer-predicate-over-epilogue=predicate-dont-vectorize \ 6; RUN: -mtriple=riscv64 -mattr=+v,+f -S < %s| FileCheck %s --check-prefix=IF-EVL 7 8; RUN: opt -passes=loop-vectorize \ 9; RUN: -force-ordered-reductions=true -hints-allow-reordering=false \ 10; RUN: -force-tail-folding-style=none \ 11; RUN: -prefer-predicate-over-epilogue=predicate-dont-vectorize \ 12; RUN: -mtriple=riscv64 -mattr=+v,+f -S < %s| FileCheck %s --check-prefix=NO-VP 13 14define float @fadd(ptr noalias nocapture readonly %a, i64 %n) { 15; IF-EVL-LABEL: @fadd( 16; IF-EVL-NEXT: entry: 17; IF-EVL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N:%.*]] 18; IF-EVL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64() 19; IF-EVL-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4 20; IF-EVL-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP0]], [[TMP2]] 21; IF-EVL-NEXT: br i1 [[TMP3]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 22; IF-EVL: vector.ph: 23; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64() 24; IF-EVL-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4 25; IF-EVL-NEXT: [[TMP6:%.*]] = sub i64 [[TMP5]], 1 26; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], [[TMP6]] 27; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP5]] 28; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]] 29; IF-EVL-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() 30; IF-EVL-NEXT: [[TMP8:%.*]] = mul i64 [[TMP7]], 4 31; IF-EVL-NEXT: br label [[VECTOR_BODY:%.*]] 32; IF-EVL: vector.body: 33; IF-EVL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 34; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], [[VECTOR_BODY]] ] 35; IF-EVL-NEXT: [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, [[VECTOR_PH]] ], [ [[TMP14:%.*]], [[VECTOR_BODY]] ] 36; IF-EVL-NEXT: [[TMP9:%.*]] = sub i64 [[N]], [[EVL_BASED_IV]] 37; IF-EVL-NEXT: [[TMP10:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP9]], i32 4, i1 true) 38; IF-EVL-NEXT: [[TMP11:%.*]] = add i64 [[EVL_BASED_IV]], 0 39; IF-EVL-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[TMP11]] 40; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i32 0 41; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP13]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]]) 42; IF-EVL-NEXT: [[TMP14]] = call float @llvm.vp.reduce.fadd.nxv4f32(float [[VEC_PHI]], <vscale x 4 x float> [[VP_OP_LOAD]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]]) 43; IF-EVL-NEXT: [[TMP15:%.*]] = zext i32 [[TMP10]] to i64 44; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP15]], [[EVL_BASED_IV]] 45; IF-EVL-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP8]] 46; IF-EVL-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 47; IF-EVL-NEXT: br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 48; IF-EVL: middle.block: 49; IF-EVL-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 50; IF-EVL: scalar.ph: 51; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 52; IF-EVL-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP14]], [[MIDDLE_BLOCK]] ], [ 0.000000e+00, [[ENTRY]] ] 53; IF-EVL-NEXT: br label [[FOR_BODY:%.*]] 54; IF-EVL: for.body: 55; IF-EVL-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ] 56; IF-EVL-NEXT: [[SUM_07:%.*]] = phi float [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[ADD:%.*]], [[FOR_BODY]] ] 57; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV]] 58; IF-EVL-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDX]], align 4 59; IF-EVL-NEXT: [[ADD]] = fadd float [[TMP17]], [[SUM_07]] 60; IF-EVL-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 61; IF-EVL-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]] 62; IF-EVL-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 63; IF-EVL: for.end: 64; IF-EVL-NEXT: [[ADD_LCSSA:%.*]] = phi float [ [[ADD]], [[FOR_BODY]] ], [ [[TMP14]], [[MIDDLE_BLOCK]] ] 65; IF-EVL-NEXT: ret float [[ADD_LCSSA]] 66; 67; NO-VP-LABEL: @fadd( 68; NO-VP-NEXT: entry: 69; NO-VP-NEXT: br label [[FOR_BODY:%.*]] 70; NO-VP: for.body: 71; NO-VP-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ] 72; NO-VP-NEXT: [[SUM_07:%.*]] = phi float [ 0.000000e+00, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ] 73; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[IV]] 74; NO-VP-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX]], align 4 75; NO-VP-NEXT: [[ADD]] = fadd float [[TMP0]], [[SUM_07]] 76; NO-VP-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 77; NO-VP-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N:%.*]] 78; NO-VP-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 79; NO-VP: for.end: 80; NO-VP-NEXT: [[ADD_LCSSA:%.*]] = phi float [ [[ADD]], [[FOR_BODY]] ] 81; NO-VP-NEXT: ret float [[ADD_LCSSA]] 82; 83entry: 84 br label %for.body 85 86for.body: 87 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 88 %sum.07 = phi float [ 0.000000e+00, %entry ], [ %add, %for.body ] 89 %arrayidx = getelementptr inbounds float, ptr %a, i64 %iv 90 %0 = load float, ptr %arrayidx, align 4 91 %add = fadd float %0, %sum.07 92 %iv.next = add nuw nsw i64 %iv, 1 93 %exitcond.not = icmp eq i64 %iv.next, %n 94 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0 95 96for.end: 97 ret float %add 98} 99 100!0 = distinct !{!0, !1} 101!1 = !{!"llvm.loop.vectorize.enable", i1 true} 102