1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt -passes=loop-vectorize -mtriple=riscv64 -mattr=+v -S %s | FileCheck %s 3 4define void @test(ptr %p, i64 %a, i8 %b) { 5; CHECK-LABEL: define void @test( 6; CHECK-SAME: ptr [[P:%.*]], i64 [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0:[0-9]+]] { 7; CHECK-NEXT: entry: 8; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 9; CHECK: vector.ph: 10; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[A]], i64 0 11; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer 12; CHECK-NEXT: [[TMP2:%.*]] = shl <4 x i64> [[BROADCAST_SPLAT]], splat (i64 48) 13; CHECK-NEXT: [[TMP3:%.*]] = ashr <4 x i64> [[TMP2]], splat (i64 52) 14; CHECK-NEXT: [[TMP4:%.*]] = trunc <4 x i64> [[TMP3]] to <4 x i32> 15; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i8> poison, i8 [[B]], i64 0 16; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT1]], <4 x i8> poison, <4 x i32> zeroinitializer 17; CHECK-NEXT: [[TMP6:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT2]] to <4 x i32> 18; CHECK-NEXT: br label [[VECTOR_BODY1:%.*]] 19; CHECK: vector.body: 20; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE8:%.*]] ] 21; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE8]] ] 22; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 23; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 [[TMP0]], i32 3) 24; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <4 x i32> [[VEC_IND]], splat (i32 2) 25; CHECK-NEXT: [[TMP5:%.*]] = select <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i1> [[TMP1]], <4 x i1> zeroinitializer 26; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[TMP5]], <4 x i32> [[TMP6]], <4 x i32> [[TMP4]] 27; CHECK-NEXT: [[TMP7:%.*]] = shl <4 x i32> [[PREDPHI]], splat (i32 8) 28; CHECK-NEXT: [[TMP8:%.*]] = trunc <4 x i32> [[TMP7]] to <4 x i8> 29; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[ACTIVE_LANE_MASK]], i32 0 30; CHECK-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF:%.*]], label [[VECTOR_BODY:%.*]] 31; CHECK: pred.store.if: 32; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i8> [[TMP8]], i32 0 33; CHECK-NEXT: store i8 [[TMP10]], ptr [[P]], align 1 34; CHECK-NEXT: br label [[VECTOR_BODY]] 35; CHECK: pred.store.continue: 36; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[ACTIVE_LANE_MASK]], i32 1 37; CHECK-NEXT: br i1 [[TMP11]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] 38; CHECK: pred.store.if3: 39; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i8> [[TMP8]], i32 1 40; CHECK-NEXT: store i8 [[TMP12]], ptr [[P]], align 1 41; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]] 42; CHECK: pred.store.continue4: 43; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[ACTIVE_LANE_MASK]], i32 2 44; CHECK-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6:%.*]] 45; CHECK: pred.store.if5: 46; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i8> [[TMP8]], i32 2 47; CHECK-NEXT: store i8 [[TMP14]], ptr [[P]], align 1 48; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]] 49; CHECK: pred.store.continue6: 50; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[ACTIVE_LANE_MASK]], i32 3 51; CHECK-NEXT: br i1 [[TMP15]], label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8]] 52; CHECK: pred.store.if7: 53; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x i8> [[TMP8]], i32 3 54; CHECK-NEXT: store i8 [[TMP16]], ptr [[P]], align 1 55; CHECK-NEXT: br label [[PRED_STORE_CONTINUE8]] 56; CHECK: pred.store.continue8: 57; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4) 58; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 59; CHECK-NEXT: br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY1]], !llvm.loop [[LOOP0:![0-9]+]] 60; CHECK: middle.block: 61; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 62; CHECK: scalar.ph: 63; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 4, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 64; CHECK-NEXT: br label [[FOR_COND:%.*]] 65; CHECK: for.cond: 66; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[ADD:%.*]], [[FOR_BODY:%.*]] ] 67; CHECK-NEXT: [[ADD]] = add i32 [[IV]], 1 68; CHECK-NEXT: [[CMP_SLT:%.*]] = icmp slt i32 [[IV]], 2 69; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[A]], 48 70; CHECK-NEXT: [[ASHR:%.*]] = ashr i64 [[SHL]], 52 71; CHECK-NEXT: [[TRUNC_I32:%.*]] = trunc i64 [[ASHR]] to i32 72; CHECK-NEXT: br i1 [[CMP_SLT]], label [[COND_FALSE:%.*]], label [[FOR_BODY]] 73; CHECK: cond.false: 74; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[B]] to i32 75; CHECK-NEXT: br label [[FOR_BODY]] 76; CHECK: for.body: 77; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TRUNC_I32]], [[FOR_COND]] ], [ [[ZEXT]], [[COND_FALSE]] ] 78; CHECK-NEXT: [[SHL_I32:%.*]] = shl i32 [[COND]], 8 79; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[SHL_I32]] to i8 80; CHECK-NEXT: store i8 [[TRUNC]], ptr [[P]], align 1 81; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[IV]], 2 82; CHECK-NEXT: br i1 [[CMP]], label [[FOR_COND]], label [[EXIT]], !llvm.loop [[LOOP3:![0-9]+]] 83; CHECK: exit: 84; CHECK-NEXT: ret void 85; 86entry: 87 br label %for.cond 88 89for.cond: ; preds = %for.body, %entry 90 %iv = phi i32 [ 0, %entry ], [ %add, %for.body ] 91 %add = add i32 %iv, 1 92 %cmp.slt = icmp slt i32 %iv, 2 93 %shl = shl i64 %a, 48 94 %ashr = ashr i64 %shl, 52 95 %trunc.i32 = trunc i64 %ashr to i32 96 br i1 %cmp.slt, label %cond.false, label %for.body 97 98cond.false: ; preds = %for.cond 99 %zext = zext i8 %b to i32 100 br label %for.body 101 102for.body: ; preds = %cond.false, %for.cond 103 %cond = phi i32 [ %trunc.i32, %for.cond ], [ %zext, %cond.false ] 104 %shl.i32 = shl i32 %cond, 8 105 %trunc = trunc i32 %shl.i32 to i8 106 store i8 %trunc, ptr %p, align 1 107 %cmp = icmp slt i32 %iv, 2 108 br i1 %cmp, label %for.cond, label %exit 109 110exit: ; preds = %for.body 111 ret void 112} 113;. 114; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} 115; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} 116; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} 117; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} 118;. 119