1; RUN: opt -passes=loop-vectorize < %s -S -o - | FileCheck %s --check-prefix=CHECK 2; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize -disable-output < %s 2>&1 | FileCheck %s --check-prefix=CHECK-COST 3; REQUIRES: asserts 4 5target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 6target triple = "thumbv8.1m.main-none-none-eabi" 7 8; CHECK-LABEL: test 9; CHECK-COST: LV: Found an estimated cost of 0 for VF 1 For instruction: %and515 = shl i32 %l41, 3 10; CHECK-COST: LV: Found an estimated cost of 1 for VF 1 For instruction: %l45 = and i32 %and515, 131072 11; CHECK-COST: Cost of 2 for VF 4: WIDEN ir<%and515> = shl ir<%l41>, ir<3> 12; CHECK-COST: Cost of 2 for VF 4: WIDEN ir<%l45> = and ir<%and515>, ir<131072> 13; CHECK-NOT: vector.body 14 15define void @test(ptr %src, i32 %N) #0 { 16entry: 17 br label %for.body386 18 19for.body386: ; preds = %entry, %l77 20 %add387 = phi i32 [ %inc532, %l77 ], [ 0, %entry ] 21 %arrayidx388 = getelementptr inbounds [101 x i32], ptr %src, i32 0, i32 %add387 22 %l41 = load i32, ptr %arrayidx388, align 4 23 %l42 = and i32 %l41, 65535 24 %l43 = icmp eq i32 %l42, 0 25 br i1 %l43, label %l77, label %l44 26 27l44: ; preds = %for.body386 28 %and515 = shl i32 %l41, 3 29 %l45 = and i32 %and515, 131072 30 %and506 = shl i32 %l41, 5 31 %l46 = and i32 %and506, 262144 32 %and497 = shl i32 %l41, 7 33 %l47 = and i32 %and497, 524288 34 %and488 = shl i32 %l41, 9 35 %l48 = and i32 %and488, 1048576 36 %and479 = shl i32 %l41, 11 37 %l49 = and i32 %and479, 2097152 38 %and470 = shl i32 %l41, 13 39 %l50 = and i32 %and470, 4194304 40 %and461 = shl i32 %l41, 15 41 %l51 = and i32 %and461, 8388608 42 %and452 = shl i32 %l41, 17 43 %l52 = and i32 %and452, 16777216 44 %and443 = shl i32 %l41, 19 45 %l53 = and i32 %and443, 33554432 46 %and434 = shl i32 %l41, 21 47 %l54 = and i32 %and434, 67108864 48 %and425 = shl i32 %l41, 23 49 %l55 = and i32 %and425, 134217728 50 %and416 = shl i32 %l41, 25 51 %l56 = and i32 %and416, 268435456 52 %and407 = shl i32 %l41, 27 53 %l57 = and i32 %and407, 536870912 54 %and398 = shl i32 %l41, 29 55 %l58 = and i32 %and398, 1073741824 56 %l59 = shl i32 %l41, 31 57 %l60 = or i32 %l59, %l41 58 %l61 = or i32 %l58, %l60 59 %l62 = or i32 %l57, %l61 60 %l63 = or i32 %l56, %l62 61 %l64 = or i32 %l55, %l63 62 %l65 = or i32 %l54, %l64 63 %l66 = or i32 %l53, %l65 64 %l67 = or i32 %l52, %l66 65 %l68 = or i32 %l51, %l67 66 %l69 = or i32 %l50, %l68 67 %l70 = or i32 %l49, %l69 68 %l71 = or i32 %l48, %l70 69 %l72 = or i32 %l47, %l71 70 %l73 = or i32 %l46, %l72 71 %l74 = or i32 %l45, %l73 72 %and524 = shl i32 %l41, 1 73 %l75 = and i32 %and524, 65536 74 %l76 = or i32 %l75, %l74 75 store i32 %l76, ptr %arrayidx388, align 4 76 br label %l77 77 78l77: ; preds = %for.body386, %l44 79 %inc532 = add nuw nsw i32 %add387, 1 80 %exitcond649 = icmp eq i32 %inc532, %N 81 br i1 %exitcond649, label %exit, label %for.body386 82 83exit: 84 ret void 85} 86 87attributes #0 = { nounwind "min-legal-vector-width"="0" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" "use-soft-float"="false" } 88