1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -passes=loop-vectorize,dce,instcombine -tail-predication=enabled -S | FileCheck %s 3 4target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 5target triple = "thumbv8.1m.main-none-none-eabi" 6 7define i32 @reduction_sum_single(ptr noalias nocapture %A) { 8; CHECK-LABEL: @reduction_sum_single( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 11; CHECK: vector.ph: 12; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 13; CHECK: vector.body: 14; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 15; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP2:%.*]], [[VECTOR_BODY]] ] 16; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 [[INDEX]], i32 257) 17; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]] 18; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP0]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> zeroinitializer) 19; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_MASKED_LOAD]]) 20; CHECK-NEXT: [[TMP2]] = add i32 [[TMP1]], [[VEC_PHI]] 21; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 22; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], 260 23; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 24; CHECK: middle.block: 25; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 26; CHECK: scalar.ph: 27; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 28; CHECK: .lr.ph: 29; CHECK-NEXT: br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP3:![0-9]+]] 30; CHECK: ._crit_edge: 31; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ poison, [[DOTLR_PH]] ], [ [[TMP2]], [[MIDDLE_BLOCK]] ] 32; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] 33; 34entry: 35 br label %.lr.ph 36 37.lr.ph: ; preds = %entry, %.lr.ph 38 %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 39 %sum.02 = phi i32 [ %l7, %.lr.ph ], [ 0, %entry ] 40 %l2 = getelementptr inbounds i32, ptr %A, i32 %indvars.iv 41 %l3 = load i32, ptr %l2, align 4 42 %l7 = add i32 %sum.02, %l3 43 %indvars.iv.next = add i32 %indvars.iv, 1 44 %exitcond = icmp eq i32 %indvars.iv.next, 257 45 br i1 %exitcond, label %._crit_edge, label %.lr.ph 46 47._crit_edge: ; preds = %.lr.ph 48 %sum.0.lcssa = phi i32 [ %l7, %.lr.ph ] 49 ret i32 %sum.0.lcssa 50} 51 52define i32 @reduction_sum(ptr noalias nocapture %A, ptr noalias nocapture %B) { 53; CHECK-LABEL: @reduction_sum( 54; CHECK-NEXT: entry: 55; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 56; CHECK: vector.ph: 57; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 58; CHECK: vector.body: 59; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 60; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 61; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP8:%.*]], [[VECTOR_BODY]] ] 62; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 [[INDEX]], i32 257) 63; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]] 64; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP0]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> zeroinitializer) 65; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[INDEX]] 66; CHECK-NEXT: [[WIDE_MASKED_LOAD1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP1]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> zeroinitializer) 67; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> [[VEC_IND]], <4 x i32> zeroinitializer 68; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP2]]) 69; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], [[VEC_PHI]] 70; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_MASKED_LOAD]]) 71; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], [[TMP4]] 72; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[WIDE_MASKED_LOAD1]]) 73; CHECK-NEXT: [[TMP8]] = add i32 [[TMP7]], [[TMP6]] 74; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 75; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4) 76; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[INDEX_NEXT]], 260 77; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 78; CHECK: middle.block: 79; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 80; CHECK: scalar.ph: 81; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 82; CHECK: .lr.ph: 83; CHECK-NEXT: br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP5:![0-9]+]] 84; CHECK: ._crit_edge: 85; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ poison, [[DOTLR_PH]] ], [ [[TMP8]], [[MIDDLE_BLOCK]] ] 86; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] 87; 88entry: 89 br label %.lr.ph 90 91.lr.ph: ; preds = %entry, %.lr.ph 92 %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 93 %sum.02 = phi i32 [ %l9, %.lr.ph ], [ 0, %entry ] 94 %l2 = getelementptr inbounds i32, ptr %A, i32 %indvars.iv 95 %l3 = load i32, ptr %l2, align 4 96 %l4 = getelementptr inbounds i32, ptr %B, i32 %indvars.iv 97 %l5 = load i32, ptr %l4, align 4 98 %l7 = add i32 %sum.02, %indvars.iv 99 %l8 = add i32 %l7, %l3 100 %l9 = add i32 %l8, %l5 101 %indvars.iv.next = add i32 %indvars.iv, 1 102 %exitcond = icmp eq i32 %indvars.iv.next, 257 103 br i1 %exitcond, label %._crit_edge, label %.lr.ph 104 105._crit_edge: ; preds = %.lr.ph 106 %sum.0.lcssa = phi i32 [ %l9, %.lr.ph ] 107 ret i32 %sum.0.lcssa 108} 109 110define i32 @reduction_prod(ptr noalias nocapture %A, ptr noalias nocapture %B) { 111; CHECK-LABEL: @reduction_prod( 112; CHECK-NEXT: entry: 113; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 114; CHECK: vector.ph: 115; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 116; CHECK: vector.body: 117; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 118; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ splat (i32 1), [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] 119; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 [[INDEX]], i32 257) 120; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]] 121; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP0]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> poison) 122; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[INDEX]] 123; CHECK-NEXT: [[WIDE_MASKED_LOAD1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP1]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> poison) 124; CHECK-NEXT: [[TMP2:%.*]] = mul <4 x i32> [[VEC_PHI]], [[WIDE_MASKED_LOAD]] 125; CHECK-NEXT: [[TMP3:%.*]] = mul <4 x i32> [[TMP2]], [[WIDE_MASKED_LOAD1]] 126; CHECK-NEXT: [[TMP4]] = select <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> [[TMP3]], <4 x i32> [[VEC_PHI]] 127; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 128; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 260 129; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] 130; CHECK: middle.block: 131; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[TMP4]]) 132; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 133; CHECK: scalar.ph: 134; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 135; CHECK: .lr.ph: 136; CHECK-NEXT: br i1 poison, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP7:![0-9]+]] 137; CHECK: ._crit_edge: 138; CHECK-NEXT: [[PROD_0_LCSSA:%.*]] = phi i32 [ poison, [[DOTLR_PH]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] 139; CHECK-NEXT: ret i32 [[PROD_0_LCSSA]] 140; 141entry: 142 br label %.lr.ph 143 144.lr.ph: ; preds = %entry, %.lr.ph 145 %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %entry ] 146 %prod.02 = phi i32 [ %l9, %.lr.ph ], [ 1, %entry ] 147 %l2 = getelementptr inbounds i32, ptr %A, i32 %indvars.iv 148 %l3 = load i32, ptr %l2, align 4 149 %l4 = getelementptr inbounds i32, ptr %B, i32 %indvars.iv 150 %l5 = load i32, ptr %l4, align 4 151 %l8 = mul i32 %prod.02, %l3 152 %l9 = mul i32 %l8, %l5 153 %indvars.iv.next = add i32 %indvars.iv, 1 154 %exitcond = icmp eq i32 %indvars.iv.next, 257 155 br i1 %exitcond, label %._crit_edge, label %.lr.ph 156 157._crit_edge: ; preds = %.lr.ph 158 %prod.0.lcssa = phi i32 [ %l9, %.lr.ph ] 159 ret i32 %prod.0.lcssa 160} 161 162define i32 @reduction_and(ptr nocapture %A, ptr nocapture %B) { 163; CHECK-LABEL: @reduction_and( 164; CHECK-NEXT: entry: 165; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 166; CHECK: vector.ph: 167; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 168; CHECK: vector.body: 169; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 170; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ splat (i32 -1), [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] 171; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 [[INDEX]], i32 257) 172; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]] 173; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP0]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> poison) 174; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[INDEX]] 175; CHECK-NEXT: [[WIDE_MASKED_LOAD1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP1]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> poison) 176; CHECK-NEXT: [[TMP2:%.*]] = and <4 x i32> [[WIDE_MASKED_LOAD]], [[WIDE_MASKED_LOAD1]] 177; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> [[TMP2]], <4 x i32> splat (i32 -1) 178; CHECK-NEXT: [[TMP4]] = and <4 x i32> [[VEC_PHI]], [[TMP3]] 179; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 180; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 260 181; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] 182; CHECK: middle.block: 183; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> [[TMP4]]) 184; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 185; CHECK: scalar.ph: 186; CHECK-NEXT: br label [[FOR_BODY:%.*]] 187; CHECK: for.body: 188; CHECK-NEXT: br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] 189; CHECK: for.end: 190; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ poison, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] 191; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]] 192; 193entry: 194 br label %for.body 195 196for.body: ; preds = %entry, %for.body 197 %indvars.iv = phi i32 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 198 %result.08 = phi i32 [ %and, %for.body ], [ -1, %entry ] 199 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %indvars.iv 200 %l0 = load i32, ptr %arrayidx, align 4 201 %arrayidx2 = getelementptr inbounds i32, ptr %B, i32 %indvars.iv 202 %l1 = load i32, ptr %arrayidx2, align 4 203 %add = and i32 %result.08, %l0 204 %and = and i32 %add, %l1 205 %indvars.iv.next = add i32 %indvars.iv, 1 206 %exitcond = icmp eq i32 %indvars.iv.next, 257 207 br i1 %exitcond, label %for.end, label %for.body 208 209for.end: ; preds = %for.body, %entry 210 %result.0.lcssa = phi i32 [ %and, %for.body ] 211 ret i32 %result.0.lcssa 212} 213 214define i32 @reduction_or(ptr nocapture %A, ptr nocapture %B) { 215; CHECK-LABEL: @reduction_or( 216; CHECK-NEXT: entry: 217; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 218; CHECK: vector.ph: 219; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 220; CHECK: vector.body: 221; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 222; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] 223; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 [[INDEX]], i32 257) 224; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]] 225; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP0]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> poison) 226; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[INDEX]] 227; CHECK-NEXT: [[WIDE_MASKED_LOAD1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP1]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> poison) 228; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[WIDE_MASKED_LOAD1]], [[WIDE_MASKED_LOAD]] 229; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> [[TMP2]], <4 x i32> zeroinitializer 230; CHECK-NEXT: [[TMP4]] = or <4 x i32> [[VEC_PHI]], [[TMP3]] 231; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 232; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 260 233; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] 234; CHECK: middle.block: 235; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP4]]) 236; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 237; CHECK: scalar.ph: 238; CHECK-NEXT: br label [[FOR_BODY:%.*]] 239; CHECK: for.body: 240; CHECK-NEXT: br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] 241; CHECK: for.end: 242; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ poison, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] 243; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]] 244; 245entry: 246 br label %for.body 247 248for.body: ; preds = %entry, %for.body 249 %indvars.iv = phi i32 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 250 %result.08 = phi i32 [ %or, %for.body ], [ 0, %entry ] 251 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %indvars.iv 252 %l0 = load i32, ptr %arrayidx, align 4 253 %arrayidx2 = getelementptr inbounds i32, ptr %B, i32 %indvars.iv 254 %l1 = load i32, ptr %arrayidx2, align 4 255 %add = add nsw i32 %l1, %l0 256 %or = or i32 %add, %result.08 257 %indvars.iv.next = add i32 %indvars.iv, 1 258 %exitcond = icmp eq i32 %indvars.iv.next, 257 259 br i1 %exitcond, label %for.end, label %for.body 260 261for.end: ; preds = %for.body, %entry 262 %result.0.lcssa = phi i32 [ %or, %for.body ] 263 ret i32 %result.0.lcssa 264} 265 266define i32 @reduction_xor(ptr nocapture %A, ptr nocapture %B) { 267; CHECK-LABEL: @reduction_xor( 268; CHECK-NEXT: entry: 269; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 270; CHECK: vector.ph: 271; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 272; CHECK: vector.body: 273; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 274; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] 275; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 [[INDEX]], i32 257) 276; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]] 277; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP0]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> poison) 278; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[INDEX]] 279; CHECK-NEXT: [[WIDE_MASKED_LOAD1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[TMP1]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> poison) 280; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[WIDE_MASKED_LOAD1]], [[WIDE_MASKED_LOAD]] 281; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> [[TMP2]], <4 x i32> zeroinitializer 282; CHECK-NEXT: [[TMP4]] = xor <4 x i32> [[VEC_PHI]], [[TMP3]] 283; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 284; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 260 285; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] 286; CHECK: middle.block: 287; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> [[TMP4]]) 288; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 289; CHECK: scalar.ph: 290; CHECK-NEXT: br label [[FOR_BODY:%.*]] 291; CHECK: for.body: 292; CHECK-NEXT: br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]] 293; CHECK: for.end: 294; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ poison, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] 295; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]] 296; 297entry: 298 br label %for.body 299 300for.body: ; preds = %entry, %for.body 301 %indvars.iv = phi i32 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 302 %result.08 = phi i32 [ %xor, %for.body ], [ 0, %entry ] 303 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %indvars.iv 304 %l0 = load i32, ptr %arrayidx, align 4 305 %arrayidx2 = getelementptr inbounds i32, ptr %B, i32 %indvars.iv 306 %l1 = load i32, ptr %arrayidx2, align 4 307 %add = add nsw i32 %l1, %l0 308 %xor = xor i32 %add, %result.08 309 %indvars.iv.next = add i32 %indvars.iv, 1 310 %exitcond = icmp eq i32 %indvars.iv.next, 257 311 br i1 %exitcond, label %for.end, label %for.body 312 313for.end: ; preds = %for.body, %entry 314 %result.0.lcssa = phi i32 [ %xor, %for.body ] 315 ret i32 %result.0.lcssa 316} 317 318define float @reduction_fadd(ptr nocapture %A, ptr nocapture %B) { 319; CHECK-LABEL: @reduction_fadd( 320; CHECK-NEXT: entry: 321; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 322; CHECK: vector.ph: 323; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 324; CHECK: vector.body: 325; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 326; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] 327; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 [[INDEX]], i32 257) 328; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i32 [[INDEX]] 329; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <4 x float> @llvm.masked.load.v4f32.p0(ptr [[TMP0]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x float> poison) 330; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds float, ptr [[B:%.*]], i32 [[INDEX]] 331; CHECK-NEXT: [[WIDE_MASKED_LOAD1:%.*]] = call <4 x float> @llvm.masked.load.v4f32.p0(ptr [[TMP1]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x float> poison) 332; CHECK-NEXT: [[TMP2:%.*]] = fadd fast <4 x float> [[VEC_PHI]], [[WIDE_MASKED_LOAD]] 333; CHECK-NEXT: [[TMP3:%.*]] = fadd fast <4 x float> [[TMP2]], [[WIDE_MASKED_LOAD1]] 334; CHECK-NEXT: [[TMP4]] = select fast <4 x i1> [[ACTIVE_LANE_MASK]], <4 x float> [[TMP3]], <4 x float> [[VEC_PHI]] 335; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 336; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 260 337; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]] 338; CHECK: middle.block: 339; CHECK-NEXT: [[TMP6:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> [[TMP4]]) 340; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 341; CHECK: scalar.ph: 342; CHECK-NEXT: br label [[FOR_BODY:%.*]] 343; CHECK: for.body: 344; CHECK-NEXT: br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]] 345; CHECK: for.end: 346; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi float [ poison, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] 347; CHECK-NEXT: ret float [[RESULT_0_LCSSA]] 348; 349entry: 350 br label %for.body 351 352for.body: ; preds = %entry, %for.body 353 %indvars.iv = phi i32 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 354 %result.08 = phi float [ %fadd, %for.body ], [ 0.0, %entry ] 355 %arrayidx = getelementptr inbounds float, ptr %A, i32 %indvars.iv 356 %l0 = load float, ptr %arrayidx, align 4 357 %arrayidx2 = getelementptr inbounds float, ptr %B, i32 %indvars.iv 358 %l1 = load float, ptr %arrayidx2, align 4 359 %add = fadd fast float %result.08, %l0 360 %fadd = fadd fast float %add, %l1 361 %indvars.iv.next = add i32 %indvars.iv, 1 362 %exitcond = icmp eq i32 %indvars.iv.next, 257 363 br i1 %exitcond, label %for.end, label %for.body 364 365for.end: ; preds = %for.body, %entry 366 %result.0.lcssa = phi float [ %fadd, %for.body ] 367 ret float %result.0.lcssa 368} 369 370define float @reduction_fmul(ptr nocapture %A, ptr nocapture %B) { 371; CHECK-LABEL: @reduction_fmul( 372; CHECK-NEXT: entry: 373; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 374; CHECK: vector.ph: 375; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 376; CHECK: vector.body: 377; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 378; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ <float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] 379; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 [[INDEX]], i32 257) 380; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i32 [[INDEX]] 381; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <4 x float> @llvm.masked.load.v4f32.p0(ptr [[TMP0]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x float> poison) 382; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds float, ptr [[B:%.*]], i32 [[INDEX]] 383; CHECK-NEXT: [[WIDE_MASKED_LOAD1:%.*]] = call <4 x float> @llvm.masked.load.v4f32.p0(ptr [[TMP1]], i32 4, <4 x i1> [[ACTIVE_LANE_MASK]], <4 x float> poison) 384; CHECK-NEXT: [[TMP2:%.*]] = fmul fast <4 x float> [[VEC_PHI]], [[WIDE_MASKED_LOAD]] 385; CHECK-NEXT: [[TMP3:%.*]] = fmul fast <4 x float> [[TMP2]], [[WIDE_MASKED_LOAD1]] 386; CHECK-NEXT: [[TMP4]] = select fast <4 x i1> [[ACTIVE_LANE_MASK]], <4 x float> [[TMP3]], <4 x float> [[VEC_PHI]] 387; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 388; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 260 389; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]] 390; CHECK: middle.block: 391; CHECK-NEXT: [[TMP6:%.*]] = call fast float @llvm.vector.reduce.fmul.v4f32(float 1.000000e+00, <4 x float> [[TMP4]]) 392; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 393; CHECK: scalar.ph: 394; CHECK-NEXT: br label [[FOR_BODY:%.*]] 395; CHECK: for.body: 396; CHECK-NEXT: br i1 poison, label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]] 397; CHECK: for.end: 398; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi float [ poison, [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] 399; CHECK-NEXT: ret float [[RESULT_0_LCSSA]] 400; 401entry: 402 br label %for.body 403 404for.body: ; preds = %entry, %for.body 405 %indvars.iv = phi i32 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 406 %result.08 = phi float [ %fmul, %for.body ], [ 0.0, %entry ] 407 %arrayidx = getelementptr inbounds float, ptr %A, i32 %indvars.iv 408 %l0 = load float, ptr %arrayidx, align 4 409 %arrayidx2 = getelementptr inbounds float, ptr %B, i32 %indvars.iv 410 %l1 = load float, ptr %arrayidx2, align 4 411 %add = fmul fast float %result.08, %l0 412 %fmul = fmul fast float %add, %l1 413 %indvars.iv.next = add i32 %indvars.iv, 1 414 %exitcond = icmp eq i32 %indvars.iv.next, 257 415 br i1 %exitcond, label %for.end, label %for.body 416 417for.end: ; preds = %for.body, %entry 418 %result.0.lcssa = phi float [ %fmul, %for.body ] 419 ret float %result.0.lcssa 420} 421 422define i32 @reduction_min(ptr nocapture %A, ptr nocapture %B) { 423; CHECK-LABEL: @reduction_min( 424; CHECK-NEXT: entry: 425; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 426; CHECK: vector.ph: 427; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 428; CHECK: vector.body: 429; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 430; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ splat (i32 1000), [[VECTOR_PH]] ], [ [[TMP1:%.*]], [[VECTOR_BODY]] ] 431; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]] 432; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4 433; CHECK-NEXT: [[TMP1]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> [[VEC_PHI]], <4 x i32> [[WIDE_LOAD]]) 434; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 435; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[INDEX_NEXT]], 256 436; CHECK-NEXT: br i1 [[TMP2]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]] 437; CHECK: middle.block: 438; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> [[TMP1]]) 439; CHECK-NEXT: br i1 false, label [[FOR_END:%.*]], label [[SCALAR_PH]] 440; CHECK: scalar.ph: 441; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP3]], [[MIDDLE_BLOCK]] ], [ poison, [[ENTRY:%.*]] ] 442; CHECK-NEXT: br label [[FOR_BODY:%.*]] 443; CHECK: for.body: 444; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 256, [[SCALAR_PH]] ] 445; CHECK-NEXT: [[RESULT_08:%.*]] = phi i32 [ [[V0:%.*]], [[FOR_BODY]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 446; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[INDVARS_IV]] 447; CHECK-NEXT: [[L0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 448; CHECK-NEXT: [[V0]] = call i32 @llvm.smin.i32(i32 [[RESULT_08]], i32 [[L0]]) 449; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i32 [[INDVARS_IV]], 1 450; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 257 451; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]] 452; CHECK: for.end: 453; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ [[V0]], [[FOR_BODY]] ], [ poison, [[MIDDLE_BLOCK]] ] 454; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]] 455; 456entry: 457 br label %for.body 458 459for.body: ; preds = %entry, %for.body 460 %indvars.iv = phi i32 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 461 %result.08 = phi i32 [ %v0, %for.body ], [ 1000, %entry ] 462 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %indvars.iv 463 %l0 = load i32, ptr %arrayidx, align 4 464 %c0 = icmp slt i32 %result.08, %l0 465 %v0 = select i1 %c0, i32 %result.08, i32 %l0 466 %indvars.iv.next = add i32 %indvars.iv, 1 467 %exitcond = icmp eq i32 %indvars.iv.next, 257 468 br i1 %exitcond, label %for.end, label %for.body 469 470for.end: ; preds = %for.body, %entry 471 %result.0.lcssa = phi i32 [ %v0, %for.body ] 472 ret i32 %result.0.lcssa 473} 474 475define i32 @reduction_max(ptr nocapture %A, ptr nocapture %B) { 476; CHECK-LABEL: @reduction_max( 477; CHECK-NEXT: entry: 478; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 479; CHECK: vector.ph: 480; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 481; CHECK: vector.body: 482; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 483; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ splat (i32 1000), [[VECTOR_PH]] ], [ [[TMP1:%.*]], [[VECTOR_BODY]] ] 484; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[INDEX]] 485; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4 486; CHECK-NEXT: [[TMP1]] = call <4 x i32> @llvm.umax.v4i32(<4 x i32> [[VEC_PHI]], <4 x i32> [[WIDE_LOAD]]) 487; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 488; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[INDEX_NEXT]], 256 489; CHECK-NEXT: br i1 [[TMP2]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]] 490; CHECK: middle.block: 491; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> [[TMP1]]) 492; CHECK-NEXT: br i1 false, label [[FOR_END:%.*]], label [[SCALAR_PH]] 493; CHECK: scalar.ph: 494; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP3]], [[MIDDLE_BLOCK]] ], [ poison, [[ENTRY:%.*]] ] 495; CHECK-NEXT: br label [[FOR_BODY:%.*]] 496; CHECK: for.body: 497; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 256, [[SCALAR_PH]] ] 498; CHECK-NEXT: [[RESULT_08:%.*]] = phi i32 [ [[V0:%.*]], [[FOR_BODY]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 499; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[INDVARS_IV]] 500; CHECK-NEXT: [[L0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 501; CHECK-NEXT: [[V0]] = call i32 @llvm.umax.i32(i32 [[RESULT_08]], i32 [[L0]]) 502; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i32 [[INDVARS_IV]], 1 503; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 257 504; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]] 505; CHECK: for.end: 506; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ [[V0]], [[FOR_BODY]] ], [ poison, [[MIDDLE_BLOCK]] ] 507; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]] 508; 509entry: 510 br label %for.body 511 512for.body: ; preds = %entry, %for.body 513 %indvars.iv = phi i32 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 514 %result.08 = phi i32 [ %v0, %for.body ], [ 1000, %entry ] 515 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %indvars.iv 516 %l0 = load i32, ptr %arrayidx, align 4 517 %c0 = icmp ugt i32 %result.08, %l0 518 %v0 = select i1 %c0, i32 %result.08, i32 %l0 519 %indvars.iv.next = add i32 %indvars.iv, 1 520 %exitcond = icmp eq i32 %indvars.iv.next, 257 521 br i1 %exitcond, label %for.end, label %for.body 522 523for.end: ; preds = %for.body, %entry 524 %result.0.lcssa = phi i32 [ %v0, %for.body ] 525 ret i32 %result.0.lcssa 526} 527 528define float @reduction_fmax(ptr nocapture %A, ptr nocapture %B) { 529; CHECK-LABEL: @reduction_fmax( 530; CHECK-NEXT: entry: 531; CHECK-NEXT: br label [[FOR_BODY:%.*]] 532; CHECK: for.body: 533; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ] 534; CHECK-NEXT: [[RESULT_08:%.*]] = phi float [ [[V0:%.*]], [[FOR_BODY]] ], [ 1.000000e+03, [[ENTRY]] ] 535; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i32 [[INDVARS_IV]] 536; CHECK-NEXT: [[L0:%.*]] = load float, ptr [[ARRAYIDX]], align 4 537; CHECK-NEXT: [[C0:%.*]] = fcmp ogt float [[RESULT_08]], [[L0]] 538; CHECK-NEXT: [[V0]] = select i1 [[C0]], float [[RESULT_08]], float [[L0]] 539; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i32 [[INDVARS_IV]], 1 540; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 257 541; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]] 542; CHECK: for.end: 543; CHECK-NEXT: ret float [[V0]] 544; 545entry: 546 br label %for.body 547 548for.body: ; preds = %entry, %for.body 549 %indvars.iv = phi i32 [ %indvars.iv.next, %for.body ], [ 0, %entry ] 550 %result.08 = phi float [ %v0, %for.body ], [ 1000.0, %entry ] 551 %arrayidx = getelementptr inbounds float, ptr %A, i32 %indvars.iv 552 %l0 = load float, ptr %arrayidx, align 4 553 %c0 = fcmp ogt float %result.08, %l0 554 %v0 = select i1 %c0, float %result.08, float %l0 555 %indvars.iv.next = add i32 %indvars.iv, 1 556 %exitcond = icmp eq i32 %indvars.iv.next, 257 557 br i1 %exitcond, label %for.end, label %for.body 558 559for.end: ; preds = %for.body, %entry 560 %result.0.lcssa = phi float [ %v0, %for.body ] 561 ret float %result.0.lcssa 562} 563