1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=loop-vectorize,instcombine,simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s -S -o - | FileCheck %s 3 4target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 5target triple = "thumbv8.1m.main-arm-none-eabi" 6 7define void @arm_abs_q7(ptr nocapture readonly %pSrc, ptr nocapture %pDst, i32 %blockSize) #0 { 8; CHECK-LABEL: @arm_abs_q7( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[PSRC2:%.*]] = ptrtoint ptr [[PSRC:%.*]] to i32 11; CHECK-NEXT: [[PDST1:%.*]] = ptrtoint ptr [[PDST:%.*]] to i32 12; CHECK-NEXT: [[CMP_NOT19:%.*]] = icmp eq i32 [[BLOCKSIZE:%.*]], 0 13; CHECK-NEXT: br i1 [[CMP_NOT19]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]] 14; CHECK: while.body.preheader: 15; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[BLOCKSIZE]], 16 16; CHECK-NEXT: [[TMP0:%.*]] = sub i32 [[PDST1]], [[PSRC2]] 17; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i32 [[TMP0]], 16 18; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[MIN_ITERS_CHECK]], i1 true, i1 [[DIFF_CHECK]] 19; CHECK-NEXT: br i1 [[OR_COND]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 20; CHECK: vector.ph: 21; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[BLOCKSIZE]], -16 22; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[PSRC]], i32 [[N_VEC]] 23; CHECK-NEXT: [[IND_END3:%.*]] = and i32 [[BLOCKSIZE]], 15 24; CHECK-NEXT: [[IND_END5:%.*]] = getelementptr i8, ptr [[PDST]], i32 [[N_VEC]] 25; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 26; CHECK: vector.body: 27; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 28; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[PSRC]], i32 [[INDEX]] 29; CHECK-NEXT: [[NEXT_GEP7:%.*]] = getelementptr i8, ptr [[PDST]], i32 [[INDEX]] 30; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[NEXT_GEP]], align 1 31; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <16 x i8> [[WIDE_LOAD]], zeroinitializer 32; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <16 x i8> [[WIDE_LOAD]], splat (i8 -128) 33; CHECK-NEXT: [[TMP3:%.*]] = sub <16 x i8> zeroinitializer, [[WIDE_LOAD]] 34; CHECK-NEXT: [[TMP4:%.*]] = select <16 x i1> [[TMP2]], <16 x i8> splat (i8 127), <16 x i8> [[TMP3]] 35; CHECK-NEXT: [[TMP5:%.*]] = select <16 x i1> [[TMP1]], <16 x i8> [[WIDE_LOAD]], <16 x i8> [[TMP4]] 36; CHECK-NEXT: store <16 x i8> [[TMP5]], ptr [[NEXT_GEP7]], align 1 37; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 16 38; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 39; CHECK-NEXT: br i1 [[TMP6]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 40; CHECK: middle.block: 41; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[BLOCKSIZE]], [[N_VEC]] 42; CHECK-NEXT: br i1 [[CMP_N]], label [[WHILE_END]], label [[SCALAR_PH]] 43; CHECK: scalar.ph: 44; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[PSRC]], [[WHILE_BODY_PREHEADER]] ] 45; CHECK-NEXT: [[BC_RESUME_VAL4:%.*]] = phi i32 [ [[IND_END3]], [[MIDDLE_BLOCK]] ], [ [[BLOCKSIZE]], [[WHILE_BODY_PREHEADER]] ] 46; CHECK-NEXT: [[BC_RESUME_VAL6:%.*]] = phi ptr [ [[IND_END5]], [[MIDDLE_BLOCK]] ], [ [[PDST]], [[WHILE_BODY_PREHEADER]] ] 47; CHECK-NEXT: br label [[WHILE_BODY:%.*]] 48; CHECK: while.body: 49; CHECK-NEXT: [[PSRC_ADDR_022:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 50; CHECK-NEXT: [[BLKCNT_021:%.*]] = phi i32 [ [[DEC:%.*]], [[WHILE_BODY]] ], [ [[BC_RESUME_VAL4]], [[SCALAR_PH]] ] 51; CHECK-NEXT: [[PDST_ADDR_020:%.*]] = phi ptr [ [[INCDEC_PTR13:%.*]], [[WHILE_BODY]] ], [ [[BC_RESUME_VAL6]], [[SCALAR_PH]] ] 52; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr [[PSRC_ADDR_022]], i32 1 53; CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[PSRC_ADDR_022]], align 1 54; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i8 [[TMP7]], 0 55; CHECK-NEXT: [[CMP5:%.*]] = icmp eq i8 [[TMP7]], -128 56; CHECK-NEXT: [[SUB:%.*]] = sub i8 0, [[TMP7]] 57; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP5]], i8 127, i8 [[SUB]] 58; CHECK-NEXT: [[COND11:%.*]] = select i1 [[CMP1]], i8 [[TMP7]], i8 [[COND]] 59; CHECK-NEXT: [[INCDEC_PTR13]] = getelementptr inbounds nuw i8, ptr [[PDST_ADDR_020]], i32 1 60; CHECK-NEXT: store i8 [[COND11]], ptr [[PDST_ADDR_020]], align 1 61; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_021]], -1 62; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0 63; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 64; CHECK: while.end: 65; CHECK-NEXT: ret void 66; 67entry: 68 %cmp.not19 = icmp eq i32 %blockSize, 0 69 br i1 %cmp.not19, label %while.end, label %while.body.preheader 70 71while.body.preheader: ; preds = %entry 72 br label %while.body 73 74while.body: ; preds = %while.body.preheader, %while.body 75 %pSrc.addr.022 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrc, %while.body.preheader ] 76 %blkCnt.021 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] 77 %pDst.addr.020 = phi ptr [ %incdec.ptr13, %while.body ], [ %pDst, %while.body.preheader ] 78 %incdec.ptr = getelementptr inbounds i8, ptr %pSrc.addr.022, i32 1 79 %0 = load i8, ptr %pSrc.addr.022, align 1 80 %cmp1 = icmp sgt i8 %0, 0 81 %cmp5 = icmp eq i8 %0, -128 82 %sub = sub i8 0, %0 83 %cond = select i1 %cmp5, i8 127, i8 %sub 84 %cond11 = select i1 %cmp1, i8 %0, i8 %cond 85 %incdec.ptr13 = getelementptr inbounds i8, ptr %pDst.addr.020, i32 1 86 store i8 %cond11, ptr %pDst.addr.020, align 1 87 %dec = add i32 %blkCnt.021, -1 88 %cmp.not = icmp eq i32 %dec, 0 89 br i1 %cmp.not, label %while.end.loopexit, label %while.body 90 91while.end.loopexit: ; preds = %while.body 92 br label %while.end 93 94while.end: ; preds = %while.end.loopexit, %entry 95 ret void 96} 97 98define void @arm_abs_q15(ptr nocapture readonly %pSrc, ptr nocapture %pDst, i32 %blockSize) #0 { 99; CHECK-LABEL: @arm_abs_q15( 100; CHECK-NEXT: entry: 101; CHECK-NEXT: [[PSRC2:%.*]] = ptrtoint ptr [[PSRC:%.*]] to i32 102; CHECK-NEXT: [[PDST1:%.*]] = ptrtoint ptr [[PDST:%.*]] to i32 103; CHECK-NEXT: [[CMP_NOT20:%.*]] = icmp eq i32 [[BLOCKSIZE:%.*]], 0 104; CHECK-NEXT: br i1 [[CMP_NOT20]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]] 105; CHECK: while.body.preheader: 106; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[BLOCKSIZE]], 8 107; CHECK-NEXT: [[TMP0:%.*]] = sub i32 [[PDST1]], [[PSRC2]] 108; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i32 [[TMP0]], 16 109; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[MIN_ITERS_CHECK]], i1 true, i1 [[DIFF_CHECK]] 110; CHECK-NEXT: br i1 [[OR_COND]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 111; CHECK: vector.ph: 112; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[BLOCKSIZE]], -8 113; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[N_VEC]], 1 114; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[PSRC]], i32 [[TMP1]] 115; CHECK-NEXT: [[IND_END3:%.*]] = and i32 [[BLOCKSIZE]], 7 116; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[N_VEC]], 1 117; CHECK-NEXT: [[IND_END5:%.*]] = getelementptr i8, ptr [[PDST]], i32 [[TMP2]] 118; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 119; CHECK: vector.body: 120; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 121; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i32 [[INDEX]], 1 122; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[PSRC]], i32 [[OFFSET_IDX]] 123; CHECK-NEXT: [[OFFSET_IDX7:%.*]] = shl i32 [[INDEX]], 1 124; CHECK-NEXT: [[NEXT_GEP8:%.*]] = getelementptr i8, ptr [[PDST]], i32 [[OFFSET_IDX7]] 125; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i16>, ptr [[NEXT_GEP]], align 2 126; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt <8 x i16> [[WIDE_LOAD]], zeroinitializer 127; CHECK-NEXT: [[TMP4:%.*]] = icmp eq <8 x i16> [[WIDE_LOAD]], splat (i16 -32768) 128; CHECK-NEXT: [[TMP5:%.*]] = sub <8 x i16> zeroinitializer, [[WIDE_LOAD]] 129; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP4]], <8 x i16> splat (i16 32767), <8 x i16> [[TMP5]] 130; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP3]], <8 x i16> [[WIDE_LOAD]], <8 x i16> [[TMP6]] 131; CHECK-NEXT: store <8 x i16> [[TMP7]], ptr [[NEXT_GEP8]], align 2 132; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 133; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 134; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 135; CHECK: middle.block: 136; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[BLOCKSIZE]], [[N_VEC]] 137; CHECK-NEXT: br i1 [[CMP_N]], label [[WHILE_END]], label [[SCALAR_PH]] 138; CHECK: scalar.ph: 139; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[PSRC]], [[WHILE_BODY_PREHEADER]] ] 140; CHECK-NEXT: [[BC_RESUME_VAL4:%.*]] = phi i32 [ [[IND_END3]], [[MIDDLE_BLOCK]] ], [ [[BLOCKSIZE]], [[WHILE_BODY_PREHEADER]] ] 141; CHECK-NEXT: [[BC_RESUME_VAL6:%.*]] = phi ptr [ [[IND_END5]], [[MIDDLE_BLOCK]] ], [ [[PDST]], [[WHILE_BODY_PREHEADER]] ] 142; CHECK-NEXT: br label [[WHILE_BODY:%.*]] 143; CHECK: while.body: 144; CHECK-NEXT: [[PSRC_ADDR_023:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 145; CHECK-NEXT: [[BLKCNT_022:%.*]] = phi i32 [ [[DEC:%.*]], [[WHILE_BODY]] ], [ [[BC_RESUME_VAL4]], [[SCALAR_PH]] ] 146; CHECK-NEXT: [[PDST_ADDR_021:%.*]] = phi ptr [ [[INCDEC_PTR13:%.*]], [[WHILE_BODY]] ], [ [[BC_RESUME_VAL6]], [[SCALAR_PH]] ] 147; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr [[PSRC_ADDR_023]], i32 2 148; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[PSRC_ADDR_023]], align 2 149; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i16 [[TMP9]], 0 150; CHECK-NEXT: [[CMP5:%.*]] = icmp eq i16 [[TMP9]], -32768 151; CHECK-NEXT: [[SUB:%.*]] = sub i16 0, [[TMP9]] 152; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP5]], i16 32767, i16 [[SUB]] 153; CHECK-NEXT: [[COND11:%.*]] = select i1 [[CMP1]], i16 [[TMP9]], i16 [[COND]] 154; CHECK-NEXT: [[INCDEC_PTR13]] = getelementptr inbounds nuw i8, ptr [[PDST_ADDR_021]], i32 2 155; CHECK-NEXT: store i16 [[COND11]], ptr [[PDST_ADDR_021]], align 2 156; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_022]], -1 157; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0 158; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], !llvm.loop [[LOOP5:![0-9]+]] 159; CHECK: while.end: 160; CHECK-NEXT: ret void 161; 162entry: 163 %cmp.not20 = icmp eq i32 %blockSize, 0 164 br i1 %cmp.not20, label %while.end, label %while.body.preheader 165 166while.body.preheader: ; preds = %entry 167 br label %while.body 168 169while.body: ; preds = %while.body.preheader, %while.body 170 %pSrc.addr.023 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrc, %while.body.preheader ] 171 %blkCnt.022 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] 172 %pDst.addr.021 = phi ptr [ %incdec.ptr13, %while.body ], [ %pDst, %while.body.preheader ] 173 %incdec.ptr = getelementptr inbounds i16, ptr %pSrc.addr.023, i32 1 174 %0 = load i16, ptr %pSrc.addr.023, align 2 175 %cmp1 = icmp sgt i16 %0, 0 176 %cmp5 = icmp eq i16 %0, -32768 177 %sub = sub i16 0, %0 178 %cond = select i1 %cmp5, i16 32767, i16 %sub 179 %cond11 = select i1 %cmp1, i16 %0, i16 %cond 180 %incdec.ptr13 = getelementptr inbounds i16, ptr %pDst.addr.021, i32 1 181 store i16 %cond11, ptr %pDst.addr.021, align 2 182 %dec = add i32 %blkCnt.022, -1 183 %cmp.not = icmp eq i32 %dec, 0 184 br i1 %cmp.not, label %while.end.loopexit, label %while.body 185 186while.end.loopexit: ; preds = %while.body 187 br label %while.end 188 189while.end: ; preds = %while.end.loopexit, %entry 190 ret void 191} 192 193define void @arm_abs_q31(ptr nocapture readonly %pSrc, ptr nocapture %pDst, i32 %blockSize) #0 { 194; CHECK-LABEL: @arm_abs_q31( 195; CHECK-NEXT: entry: 196; CHECK-NEXT: [[PSRC2:%.*]] = ptrtoint ptr [[PSRC:%.*]] to i32 197; CHECK-NEXT: [[PDST1:%.*]] = ptrtoint ptr [[PDST:%.*]] to i32 198; CHECK-NEXT: [[CMP_NOT14:%.*]] = icmp eq i32 [[BLOCKSIZE:%.*]], 0 199; CHECK-NEXT: br i1 [[CMP_NOT14]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]] 200; CHECK: while.body.preheader: 201; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[BLOCKSIZE]], 4 202; CHECK-NEXT: [[TMP0:%.*]] = sub i32 [[PDST1]], [[PSRC2]] 203; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i32 [[TMP0]], 16 204; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[MIN_ITERS_CHECK]], i1 true, i1 [[DIFF_CHECK]] 205; CHECK-NEXT: br i1 [[OR_COND]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 206; CHECK: vector.ph: 207; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[BLOCKSIZE]], -4 208; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[N_VEC]], 2 209; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[PSRC]], i32 [[TMP1]] 210; CHECK-NEXT: [[IND_END3:%.*]] = and i32 [[BLOCKSIZE]], 3 211; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[N_VEC]], 2 212; CHECK-NEXT: [[IND_END5:%.*]] = getelementptr i8, ptr [[PDST]], i32 [[TMP2]] 213; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 214; CHECK: vector.body: 215; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 216; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i32 [[INDEX]], 2 217; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[PSRC]], i32 [[OFFSET_IDX]] 218; CHECK-NEXT: [[OFFSET_IDX7:%.*]] = shl i32 [[INDEX]], 2 219; CHECK-NEXT: [[NEXT_GEP8:%.*]] = getelementptr i8, ptr [[PDST]], i32 [[OFFSET_IDX7]] 220; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[NEXT_GEP]], align 4 221; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt <4 x i32> [[WIDE_LOAD]], zeroinitializer 222; CHECK-NEXT: [[TMP4:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], splat (i32 -2147483648) 223; CHECK-NEXT: [[TMP5:%.*]] = sub nsw <4 x i32> zeroinitializer, [[WIDE_LOAD]] 224; CHECK-NEXT: [[TMP6:%.*]] = select <4 x i1> [[TMP4]], <4 x i32> splat (i32 2147483647), <4 x i32> [[TMP5]] 225; CHECK-NEXT: [[TMP7:%.*]] = select <4 x i1> [[TMP3]], <4 x i32> [[WIDE_LOAD]], <4 x i32> [[TMP6]] 226; CHECK-NEXT: store <4 x i32> [[TMP7]], ptr [[NEXT_GEP8]], align 4 227; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 228; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 229; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] 230; CHECK: middle.block: 231; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[BLOCKSIZE]], [[N_VEC]] 232; CHECK-NEXT: br i1 [[CMP_N]], label [[WHILE_END]], label [[SCALAR_PH]] 233; CHECK: scalar.ph: 234; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[PSRC]], [[WHILE_BODY_PREHEADER]] ] 235; CHECK-NEXT: [[BC_RESUME_VAL4:%.*]] = phi i32 [ [[IND_END3]], [[MIDDLE_BLOCK]] ], [ [[BLOCKSIZE]], [[WHILE_BODY_PREHEADER]] ] 236; CHECK-NEXT: [[BC_RESUME_VAL6:%.*]] = phi ptr [ [[IND_END5]], [[MIDDLE_BLOCK]] ], [ [[PDST]], [[WHILE_BODY_PREHEADER]] ] 237; CHECK-NEXT: br label [[WHILE_BODY:%.*]] 238; CHECK: while.body: 239; CHECK-NEXT: [[PSRC_ADDR_017:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 240; CHECK-NEXT: [[BLKCNT_016:%.*]] = phi i32 [ [[DEC:%.*]], [[WHILE_BODY]] ], [ [[BC_RESUME_VAL4]], [[SCALAR_PH]] ] 241; CHECK-NEXT: [[PDST_ADDR_015:%.*]] = phi ptr [ [[INCDEC_PTR7:%.*]], [[WHILE_BODY]] ], [ [[BC_RESUME_VAL6]], [[SCALAR_PH]] ] 242; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr [[PSRC_ADDR_017]], i32 4 243; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[PSRC_ADDR_017]], align 4 244; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[TMP9]], 0 245; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[TMP9]], -2147483648 246; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[TMP9]] 247; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP2]], i32 2147483647, i32 [[SUB]] 248; CHECK-NEXT: [[COND6:%.*]] = select i1 [[CMP1]], i32 [[TMP9]], i32 [[COND]] 249; CHECK-NEXT: [[INCDEC_PTR7]] = getelementptr inbounds nuw i8, ptr [[PDST_ADDR_015]], i32 4 250; CHECK-NEXT: store i32 [[COND6]], ptr [[PDST_ADDR_015]], align 4 251; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_016]], -1 252; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0 253; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], !llvm.loop [[LOOP7:![0-9]+]] 254; CHECK: while.end: 255; CHECK-NEXT: ret void 256; 257entry: 258 %cmp.not14 = icmp eq i32 %blockSize, 0 259 br i1 %cmp.not14, label %while.end, label %while.body.preheader 260 261while.body.preheader: ; preds = %entry 262 br label %while.body 263 264while.body: ; preds = %while.body.preheader, %while.body 265 %pSrc.addr.017 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrc, %while.body.preheader ] 266 %blkCnt.016 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] 267 %pDst.addr.015 = phi ptr [ %incdec.ptr7, %while.body ], [ %pDst, %while.body.preheader ] 268 %incdec.ptr = getelementptr inbounds i32, ptr %pSrc.addr.017, i32 1 269 %0 = load i32, ptr %pSrc.addr.017, align 4 270 %cmp1 = icmp sgt i32 %0, 0 271 %cmp2 = icmp eq i32 %0, -2147483648 272 %sub = sub nsw i32 0, %0 273 %cond = select i1 %cmp2, i32 2147483647, i32 %sub 274 %cond6 = select i1 %cmp1, i32 %0, i32 %cond 275 %incdec.ptr7 = getelementptr inbounds i32, ptr %pDst.addr.015, i32 1 276 store i32 %cond6, ptr %pDst.addr.015, align 4 277 %dec = add i32 %blkCnt.016, -1 278 %cmp.not = icmp eq i32 %dec, 0 279 br i1 %cmp.not, label %while.end.loopexit, label %while.body 280 281while.end.loopexit: ; preds = %while.body 282 br label %while.end 283 284while.end: ; preds = %while.end.loopexit, %entry 285 ret void 286} 287 288attributes #0 = { "target-features"="+mve" } 289