1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; REQUIRES: asserts 3; RUN: opt < %s -passes=loop-vectorize -vectorizer-maximize-bandwidth -S 2>&1 | FileCheck %s 4; RUN: opt < %s -passes=loop-vectorize -vectorizer-maximize-bandwidth -S -debug-only=loop-vectorize 2>&1 -disable-output | FileCheck %s --check-prefix=COST 5 6target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 7target triple = "aarch64" 8 9; Check that the maximize vector bandwidth option does not give incorrect costs 10; due to invalid cost decisions. The loop below has a low maximum trip count, 11; so will be masked. 12 13; COST: Cost of 3000000 for VF 2: REPLICATE ir<%0> = load 14; COST: Cost of 3000000 for VF 4: REPLICATE ir<%0> = load 15; COST: Cost of 3000000 for VF 8: REPLICATE ir<%0> = load 16; COST: Cost of 3000000 for VF 16: REPLICATE ir<%0> = load 17; COST: LV: Selecting VF: 1. 18 19define i32 @test(ptr nocapture noundef readonly %pInVec, ptr nocapture noundef readonly %pInA1, ptr nocapture noundef readonly %pInA2, ptr nocapture noundef readonly %pInA3, ptr nocapture noundef readonly %pInA4, i32 noundef %numCols) { 20; CHECK-LABEL: @test( 21; CHECK-NEXT: entry: 22; CHECK-NEXT: [[AND:%.*]] = and i32 [[NUMCOLS:%.*]], 3 23; CHECK-NEXT: [[CMP_NOT32:%.*]] = icmp eq i32 [[AND]], 0 24; CHECK-NEXT: br i1 [[CMP_NOT32]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]] 25; CHECK: while.body.preheader: 26; CHECK-NEXT: br label [[WHILE_BODY:%.*]] 27; CHECK: while.body: 28; CHECK-NEXT: [[PINVEC_ADDR_042:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[WHILE_BODY]] ], [ [[PINVEC:%.*]], [[WHILE_BODY_PREHEADER]] ] 29; CHECK-NEXT: [[SUM4_041:%.*]] = phi i32 [ [[ADD14:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ] 30; CHECK-NEXT: [[SUM3_040:%.*]] = phi i32 [ [[ADD10:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ] 31; CHECK-NEXT: [[SUM2_039:%.*]] = phi i32 [ [[ADD6:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ] 32; CHECK-NEXT: [[SUM1_038:%.*]] = phi i32 [ [[ADD:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ] 33; CHECK-NEXT: [[COLCNT_037:%.*]] = phi i32 [ [[DEC:%.*]], [[WHILE_BODY]] ], [ [[AND]], [[WHILE_BODY_PREHEADER]] ] 34; CHECK-NEXT: [[PINA1_ADDR_036:%.*]] = phi ptr [ [[INCDEC_PTR1:%.*]], [[WHILE_BODY]] ], [ [[PINA1:%.*]], [[WHILE_BODY_PREHEADER]] ] 35; CHECK-NEXT: [[PINA4_ADDR_035:%.*]] = phi ptr [ [[INCDEC_PTR11:%.*]], [[WHILE_BODY]] ], [ [[PINA4:%.*]], [[WHILE_BODY_PREHEADER]] ] 36; CHECK-NEXT: [[PINA3_ADDR_034:%.*]] = phi ptr [ [[INCDEC_PTR7:%.*]], [[WHILE_BODY]] ], [ [[PINA3:%.*]], [[WHILE_BODY_PREHEADER]] ] 37; CHECK-NEXT: [[PINA2_ADDR_033:%.*]] = phi ptr [ [[INCDEC_PTR3:%.*]], [[WHILE_BODY]] ], [ [[PINA2:%.*]], [[WHILE_BODY_PREHEADER]] ] 38; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[PINVEC_ADDR_042]], i64 1 39; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[PINVEC_ADDR_042]], align 1 40; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP0]] to i32 41; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds i8, ptr [[PINA1_ADDR_036]], i64 1 42; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[PINA1_ADDR_036]], align 1 43; CHECK-NEXT: [[CONV2:%.*]] = sext i8 [[TMP1]] to i32 44; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV2]], [[CONV]] 45; CHECK-NEXT: [[ADD]] = add nsw i32 [[MUL]], [[SUM1_038]] 46; CHECK-NEXT: [[INCDEC_PTR3]] = getelementptr inbounds i8, ptr [[PINA2_ADDR_033]], i64 1 47; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[PINA2_ADDR_033]], align 1 48; CHECK-NEXT: [[CONV4:%.*]] = sext i8 [[TMP2]] to i32 49; CHECK-NEXT: [[MUL5:%.*]] = mul nsw i32 [[CONV4]], [[CONV]] 50; CHECK-NEXT: [[ADD6]] = add nsw i32 [[MUL5]], [[SUM2_039]] 51; CHECK-NEXT: [[INCDEC_PTR7]] = getelementptr inbounds i8, ptr [[PINA3_ADDR_034]], i64 1 52; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr [[PINA3_ADDR_034]], align 1 53; CHECK-NEXT: [[CONV8:%.*]] = sext i8 [[TMP3]] to i32 54; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV8]], [[CONV]] 55; CHECK-NEXT: [[ADD10]] = add nsw i32 [[MUL9]], [[SUM3_040]] 56; CHECK-NEXT: [[INCDEC_PTR11]] = getelementptr inbounds i8, ptr [[PINA4_ADDR_035]], i64 1 57; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[PINA4_ADDR_035]], align 1 58; CHECK-NEXT: [[CONV12:%.*]] = sext i8 [[TMP4]] to i32 59; CHECK-NEXT: [[MUL13:%.*]] = mul nsw i32 [[CONV12]], [[CONV]] 60; CHECK-NEXT: [[ADD14]] = add nsw i32 [[MUL13]], [[SUM4_041]] 61; CHECK-NEXT: [[DEC]] = add nsw i32 [[COLCNT_037]], -1 62; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0 63; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END_LOOPEXIT:%.*]], label [[WHILE_BODY]] 64; CHECK: while.end.loopexit: 65; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], [[WHILE_BODY]] ] 66; CHECK-NEXT: [[ADD6_LCSSA:%.*]] = phi i32 [ [[ADD6]], [[WHILE_BODY]] ] 67; CHECK-NEXT: [[ADD10_LCSSA:%.*]] = phi i32 [ [[ADD10]], [[WHILE_BODY]] ] 68; CHECK-NEXT: [[ADD14_LCSSA:%.*]] = phi i32 [ [[ADD14]], [[WHILE_BODY]] ] 69; CHECK-NEXT: [[TMP5:%.*]] = add nsw i32 [[ADD6_LCSSA]], [[ADD_LCSSA]] 70; CHECK-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP5]], [[ADD10_LCSSA]] 71; CHECK-NEXT: [[TMP7:%.*]] = add nsw i32 [[TMP6]], [[ADD14_LCSSA]] 72; CHECK-NEXT: br label [[WHILE_END]] 73; CHECK: while.end: 74; CHECK-NEXT: [[ADD17:%.*]] = phi i32 [ [[TMP7]], [[WHILE_END_LOOPEXIT]] ], [ 0, [[ENTRY:%.*]] ] 75; CHECK-NEXT: ret i32 [[ADD17]] 76; 77entry: 78 %and = and i32 %numCols, 3 79 %cmp.not32 = icmp eq i32 %and, 0 80 br i1 %cmp.not32, label %while.end, label %while.body 81 82while.body: ; preds = %entry, %while.body 83 %pInVec.addr.042 = phi ptr [ %incdec.ptr, %while.body ], [ %pInVec, %entry ] 84 %sum4.041 = phi i32 [ %add14, %while.body ], [ 0, %entry ] 85 %sum3.040 = phi i32 [ %add10, %while.body ], [ 0, %entry ] 86 %sum2.039 = phi i32 [ %add6, %while.body ], [ 0, %entry ] 87 %sum1.038 = phi i32 [ %add, %while.body ], [ 0, %entry ] 88 %colCnt.037 = phi i32 [ %dec, %while.body ], [ %and, %entry ] 89 %pInA1.addr.036 = phi ptr [ %incdec.ptr1, %while.body ], [ %pInA1, %entry ] 90 %pInA4.addr.035 = phi ptr [ %incdec.ptr11, %while.body ], [ %pInA4, %entry ] 91 %pInA3.addr.034 = phi ptr [ %incdec.ptr7, %while.body ], [ %pInA3, %entry ] 92 %pInA2.addr.033 = phi ptr [ %incdec.ptr3, %while.body ], [ %pInA2, %entry ] 93 %incdec.ptr = getelementptr inbounds i8, ptr %pInVec.addr.042, i64 1 94 %0 = load i8, ptr %pInVec.addr.042, align 1 95 %conv = sext i8 %0 to i32 96 %incdec.ptr1 = getelementptr inbounds i8, ptr %pInA1.addr.036, i64 1 97 %1 = load i8, ptr %pInA1.addr.036, align 1 98 %conv2 = sext i8 %1 to i32 99 %mul = mul nsw i32 %conv2, %conv 100 %add = add nsw i32 %mul, %sum1.038 101 %incdec.ptr3 = getelementptr inbounds i8, ptr %pInA2.addr.033, i64 1 102 %2 = load i8, ptr %pInA2.addr.033, align 1 103 %conv4 = sext i8 %2 to i32 104 %mul5 = mul nsw i32 %conv4, %conv 105 %add6 = add nsw i32 %mul5, %sum2.039 106 %incdec.ptr7 = getelementptr inbounds i8, ptr %pInA3.addr.034, i64 1 107 %3 = load i8, ptr %pInA3.addr.034, align 1 108 %conv8 = sext i8 %3 to i32 109 %mul9 = mul nsw i32 %conv8, %conv 110 %add10 = add nsw i32 %mul9, %sum3.040 111 %incdec.ptr11 = getelementptr inbounds i8, ptr %pInA4.addr.035, i64 1 112 %4 = load i8, ptr %pInA4.addr.035, align 1 113 %conv12 = sext i8 %4 to i32 114 %mul13 = mul nsw i32 %conv12, %conv 115 %add14 = add nsw i32 %mul13, %sum4.041 116 %dec = add nsw i32 %colCnt.037, -1 117 %cmp.not = icmp eq i32 %dec, 0 118 br i1 %cmp.not, label %while.end.loopexit, label %while.body 119 120while.end.loopexit: ; preds = %while.body 121 %5 = add nsw i32 %add6, %add 122 %6 = add nsw i32 %5, %add10 123 %7 = add nsw i32 %6, %add14 124 br label %while.end 125 126while.end: ; preds = %while.end.loopexit, %entry 127 %add17 = phi i32 [ %7, %while.end.loopexit ], [ 0, %entry ] 128 ret i32 %add17 129} 130