xref: /llvm-project/llvm/test/Transforms/LoopUnroll/partially-unroll-unconditional-latch.ll (revision b9808e5660f5fe9e7414c0c0b93acd899235471c)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=loop-unroll -unroll-allow-partial -S %s -verify-loop-info -verify-dom-info -verify-loop-lcssa | FileCheck %s
3
4@table = internal unnamed_addr global [344 x i32] zeroinitializer, align 16
5
6define i32 @test_partial_unroll_with_breakout_at_iter0() {
7;
8;
9; CHECK-LABEL: @test_partial_unroll_with_breakout_at_iter0(
10; CHECK-NEXT:  entry:
11; CHECK-NEXT:    br label [[FOR_HEADER:%.*]]
12; CHECK:       for.header:
13; CHECK-NEXT:    [[RED:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RED_NEXT_3:%.*]], [[FOR_LATCH_3:%.*]] ]
14; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IV_NEXT_3:%.*]], [[FOR_LATCH_3]] ]
15; CHECK-NEXT:    [[RED_NEXT:%.*]] = add nuw nsw i32 10, [[RED]]
16; CHECK-NEXT:    [[IV_NEXT:%.*]] = add nuw nsw i64 [[IV]], 2
17; CHECK-NEXT:    [[PTR:%.*]] = getelementptr inbounds [344 x i32], ptr @table, i64 0, i64 [[IV_NEXT]]
18; CHECK-NEXT:    store i32 [[RED_NEXT]], ptr [[PTR]], align 4
19; CHECK-NEXT:    br label [[FOR_LATCH:%.*]]
20; CHECK:       for.latch:
21; CHECK-NEXT:    [[RED_NEXT_1:%.*]] = add nuw nsw i32 10, [[RED_NEXT]]
22; CHECK-NEXT:    [[IV_NEXT_1:%.*]] = add nuw nsw i64 [[IV]], 4
23; CHECK-NEXT:    [[PTR_1:%.*]] = getelementptr inbounds [344 x i32], ptr @table, i64 0, i64 [[IV_NEXT_1]]
24; CHECK-NEXT:    store i32 [[RED_NEXT_1]], ptr [[PTR_1]], align 4
25; CHECK-NEXT:    br label [[FOR_LATCH_1:%.*]]
26; CHECK:       for.latch.1:
27; CHECK-NEXT:    [[RED_NEXT_2:%.*]] = add nuw nsw i32 10, [[RED_NEXT_1]]
28; CHECK-NEXT:    [[IV_NEXT_2:%.*]] = add nuw nsw i64 [[IV]], 6
29; CHECK-NEXT:    [[PTR_2:%.*]] = getelementptr inbounds [344 x i32], ptr @table, i64 0, i64 [[IV_NEXT_2]]
30; CHECK-NEXT:    store i32 [[RED_NEXT_2]], ptr [[PTR_2]], align 4
31; CHECK-NEXT:    br label [[FOR_LATCH_2:%.*]]
32; CHECK:       for.latch.2:
33; CHECK-NEXT:    [[RED_NEXT_3]] = add nuw nsw i32 10, [[RED_NEXT_2]]
34; CHECK-NEXT:    [[IV_NEXT_3]] = add nuw nsw i64 [[IV]], 8
35; CHECK-NEXT:    [[PTR_3:%.*]] = getelementptr inbounds [344 x i32], ptr @table, i64 0, i64 [[IV_NEXT_3]]
36; CHECK-NEXT:    store i32 [[RED_NEXT_3]], ptr [[PTR_3]], align 4
37; CHECK-NEXT:    [[EXITCOND_1_I_3:%.*]] = icmp eq i64 [[IV_NEXT_3]], 344
38; CHECK-NEXT:    br i1 [[EXITCOND_1_I_3]], label [[EXIT:%.*]], label [[FOR_LATCH_3]]
39; CHECK:       for.latch.3:
40; CHECK-NEXT:    br label [[FOR_HEADER]]
41; CHECK:       exit:
42; CHECK-NEXT:    ret i32 0
43;
44entry:
45  br label %for.header
46
47for.header:                                     ; preds = %for.body28.i.for.body28.i_crit_edge, %for.body.i
48  %red = phi i32 [ 0, %entry ], [ %red.next, %for.latch ]
49  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.latch ]
50  %red.next = add i32 10, %red
51  %iv.next = add nuw nsw i64 %iv, 2
52  %ptr = getelementptr inbounds [344 x i32], ptr @table, i64 0, i64 %iv.next
53  store i32 %red.next, ptr %ptr, align 4
54  %exitcond.1.i = icmp eq i64 %iv.next, 344
55  br i1 %exitcond.1.i, label %exit, label %for.latch
56
57for.latch:              ; preds = %for.header
58  br label %for.header
59
60exit:
61  ret i32 0
62}
63