xref: /llvm-project/llvm/test/Transforms/LoopUnroll/partial-unroll-non-latch-exit.ll (revision b9808e5660f5fe9e7414c0c0b93acd899235471c)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -passes=loop-unroll -unroll-allow-partial %s | FileCheck %s
3
4; This is a variant on full-unroll-non-latch-exit.ll for partial unrolling.
5; This test is primarily interested in making sure that latches are not
6; folded incorrectly, not that a transform occurs.
7
8define i1 @test(ptr %a1, ptr %a2) {
9; CHECK-LABEL: @test(
10; CHECK-NEXT:  start:
11; CHECK-NEXT:    br label [[LOOP:%.*]]
12; CHECK:       loop:
13; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[START:%.*]] ], [ [[IV_NEXT_4:%.*]], [[LATCH_4:%.*]] ]
14; CHECK-NEXT:    br label [[LATCH:%.*]]
15; CHECK:       latch:
16; CHECK-NEXT:    [[IV_NEXT:%.*]] = add nuw nsw i64 [[IV]], 1
17; CHECK-NEXT:    [[GEP1:%.*]] = getelementptr inbounds i64, ptr [[A1:%.*]], i64 [[IV]]
18; CHECK-NEXT:    [[GEP2:%.*]] = getelementptr inbounds i64, ptr [[A2:%.*]], i64 [[IV]]
19; CHECK-NEXT:    [[LOAD1:%.*]] = load i64, ptr [[GEP1]], align 8
20; CHECK-NEXT:    [[LOAD2:%.*]] = load i64, ptr [[GEP2]], align 8
21; CHECK-NEXT:    [[EXITCOND2:%.*]] = icmp eq i64 [[LOAD1]], [[LOAD2]]
22; CHECK-NEXT:    br i1 [[EXITCOND2]], label [[LOOP_1:%.*]], label [[EXIT:%.*]]
23; CHECK:       loop.1:
24; CHECK-NEXT:    br label [[LATCH_1:%.*]]
25; CHECK:       latch.1:
26; CHECK-NEXT:    [[IV_NEXT_1:%.*]] = add nuw nsw i64 [[IV]], 2
27; CHECK-NEXT:    [[GEP1_1:%.*]] = getelementptr inbounds i64, ptr [[A1]], i64 [[IV_NEXT]]
28; CHECK-NEXT:    [[GEP2_1:%.*]] = getelementptr inbounds i64, ptr [[A2]], i64 [[IV_NEXT]]
29; CHECK-NEXT:    [[LOAD1_1:%.*]] = load i64, ptr [[GEP1_1]], align 8
30; CHECK-NEXT:    [[LOAD2_1:%.*]] = load i64, ptr [[GEP2_1]], align 8
31; CHECK-NEXT:    [[EXITCOND2_1:%.*]] = icmp eq i64 [[LOAD1_1]], [[LOAD2_1]]
32; CHECK-NEXT:    br i1 [[EXITCOND2_1]], label [[LOOP_2:%.*]], label [[EXIT]]
33; CHECK:       loop.2:
34; CHECK-NEXT:    br label [[LATCH_2:%.*]]
35; CHECK:       latch.2:
36; CHECK-NEXT:    [[IV_NEXT_2:%.*]] = add nuw nsw i64 [[IV]], 3
37; CHECK-NEXT:    [[GEP1_2:%.*]] = getelementptr inbounds i64, ptr [[A1]], i64 [[IV_NEXT_1]]
38; CHECK-NEXT:    [[GEP2_2:%.*]] = getelementptr inbounds i64, ptr [[A2]], i64 [[IV_NEXT_1]]
39; CHECK-NEXT:    [[LOAD1_2:%.*]] = load i64, ptr [[GEP1_2]], align 8
40; CHECK-NEXT:    [[LOAD2_2:%.*]] = load i64, ptr [[GEP2_2]], align 8
41; CHECK-NEXT:    [[EXITCOND2_2:%.*]] = icmp eq i64 [[LOAD1_2]], [[LOAD2_2]]
42; CHECK-NEXT:    br i1 [[EXITCOND2_2]], label [[LOOP_3:%.*]], label [[EXIT]]
43; CHECK:       loop.3:
44; CHECK-NEXT:    br label [[LATCH_3:%.*]]
45; CHECK:       latch.3:
46; CHECK-NEXT:    [[IV_NEXT_3:%.*]] = add nuw nsw i64 [[IV]], 4
47; CHECK-NEXT:    [[GEP1_3:%.*]] = getelementptr inbounds i64, ptr [[A1]], i64 [[IV_NEXT_2]]
48; CHECK-NEXT:    [[GEP2_3:%.*]] = getelementptr inbounds i64, ptr [[A2]], i64 [[IV_NEXT_2]]
49; CHECK-NEXT:    [[LOAD1_3:%.*]] = load i64, ptr [[GEP1_3]], align 8
50; CHECK-NEXT:    [[LOAD2_3:%.*]] = load i64, ptr [[GEP2_3]], align 8
51; CHECK-NEXT:    [[EXITCOND2_3:%.*]] = icmp eq i64 [[LOAD1_3]], [[LOAD2_3]]
52; CHECK-NEXT:    br i1 [[EXITCOND2_3]], label [[LOOP_4:%.*]], label [[EXIT]]
53; CHECK:       loop.4:
54; CHECK-NEXT:    [[EXITCOND_4:%.*]] = icmp eq i64 [[IV_NEXT_3]], 24
55; CHECK-NEXT:    br i1 [[EXITCOND_4]], label [[EXIT]], label [[LATCH_4]]
56; CHECK:       latch.4:
57; CHECK-NEXT:    [[IV_NEXT_4]] = add nuw nsw i64 [[IV]], 5
58; CHECK-NEXT:    [[GEP1_4:%.*]] = getelementptr inbounds i64, ptr [[A1]], i64 [[IV_NEXT_3]]
59; CHECK-NEXT:    [[GEP2_4:%.*]] = getelementptr inbounds i64, ptr [[A2]], i64 [[IV_NEXT_3]]
60; CHECK-NEXT:    [[LOAD1_4:%.*]] = load i64, ptr [[GEP1_4]], align 8
61; CHECK-NEXT:    [[LOAD2_4:%.*]] = load i64, ptr [[GEP2_4]], align 8
62; CHECK-NEXT:    [[EXITCOND2_4:%.*]] = icmp eq i64 [[LOAD1_4]], [[LOAD2_4]]
63; CHECK-NEXT:    br i1 [[EXITCOND2_4]], label [[LOOP]], label [[EXIT]]
64; CHECK:       exit:
65; CHECK-NEXT:    [[EXIT_VAL:%.*]] = phi i1 [ false, [[LATCH]] ], [ false, [[LATCH_1]] ], [ false, [[LATCH_2]] ], [ false, [[LATCH_3]] ], [ true, [[LOOP_4]] ], [ false, [[LATCH_4]] ]
66; CHECK-NEXT:    ret i1 [[EXIT_VAL]]
67;
68start:
69  br label %loop
70
71loop:
72  %iv = phi i64 [ 0, %start ], [ %iv.next, %latch ]
73  %exitcond = icmp eq i64 %iv, 24
74  br i1 %exitcond, label %exit, label %latch
75
76latch:
77  %iv.next = add nuw nsw i64 %iv, 1
78  %gep1 = getelementptr inbounds i64, ptr %a1, i64 %iv
79  %gep2 = getelementptr inbounds i64, ptr %a2, i64 %iv
80  %load1 = load i64, ptr %gep1, align 8
81  %load2 = load i64, ptr %gep2, align 8
82  %exitcond2 = icmp eq i64 %load1, %load2
83  br i1 %exitcond2, label %loop, label %exit
84
85exit:
86  %exit.val = phi i1 [ false, %latch ], [ true, %loop ]
87  ret i1 %exit.val
88}
89