1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=loop-reduce -S %s | FileCheck %s 3 4target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7" 5 6define i32 @test(i1 %c.1, ptr %src) { 7; CHECK-LABEL: @test( 8; CHECK-NEXT: entry: 9; CHECK-NEXT: br label [[LOOP_HEADER:%.*]] 10; CHECK: loop.header: 11; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ] 12; CHECK-NEXT: br i1 [[C_1:%.*]], label [[LOOP_LATCH]], label [[LOOP_THEN:%.*]] 13; CHECK: loop.then: 14; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[SRC:%.*]], align 4 15; CHECK-NEXT: [[C_2:%.*]] = icmp eq i32 [[L]], 0 16; CHECK-NEXT: br label [[LOOP_LATCH]] 17; CHECK: loop.latch: 18; CHECK-NEXT: [[P:%.*]] = phi i1 [ [[C_2]], [[LOOP_THEN]] ], [ false, [[LOOP_HEADER]] ] 19; CHECK-NEXT: [[T:%.*]] = icmp sgt i32 [[LSR_IV]], -1050 20; CHECK-NEXT: [[OR:%.*]] = or i1 [[P]], [[T]] 21; CHECK-NEXT: [[ZEXT_OR:%.*]] = zext i1 [[OR]] to i32 22; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw i32 [[LSR_IV]], 1 23; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LSR_IV_NEXT]], -1 24; CHECK-NEXT: [[LOOP_HEADER_TERMCOND:%.*]] = icmp sgt i32 [[TMP0]], -1050 25; CHECK-NEXT: br i1 [[LOOP_HEADER_TERMCOND]], label [[LOOP_HEADER]], label [[EXIT:%.*]] 26; CHECK: exit: 27; CHECK-NEXT: [[ZEXT_OR_LCSSA:%.*]] = phi i32 [ [[ZEXT_OR]], [[LOOP_LATCH]] ] 28; CHECK-NEXT: ret i32 [[ZEXT_OR_LCSSA]] 29; 30entry: 31 br label %loop.header 32 33loop.header: 34 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ] 35 br i1 %c.1, label %loop.latch, label %loop.then 36 37loop.then: 38 %l = load i32, ptr %src 39 %c.2 = icmp eq i32 %l, 0 40 br label %loop.latch 41 42loop.latch: 43 %p = phi i1 [ %c.2, %loop.then ], [ 0, %loop.header ] 44 %t = icmp sgt i32 %iv, -1050 45 %or = or i1 %p, %t 46 %zext.or = zext i1 %or to i32 47 %iv.next = add i32 %iv, %zext.or 48 br i1 %t, label %loop.header, label %exit 49 50exit: 51 ret i32 %zext.or 52} 53