1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 2; RUN: opt -S -loop-reduce < %s | FileCheck %s 3 4target triple = "x86_64-unknown-unknown" 5target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" 6 7define void @incorrect_offset_scaling(i1 %c, i1 %c2, i1 %c3, ptr %p, i64, ptr) { 8; CHECK-LABEL: define void @incorrect_offset_scaling( 9; CHECK-SAME: i1 [[C:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]], ptr [[P:%.*]], i64 [[TMP0:%.*]], ptr [[TMP1:%.*]]) { 10; CHECK-NEXT: top: 11; CHECK-NEXT: br label [[L:%.*]] 12; CHECK: L.loopexit: 13; CHECK-NEXT: br label [[L_BACKEDGE:%.*]] 14; CHECK: L: 15; CHECK-NEXT: br i1 [[C]], label [[L_BACKEDGE]], label [[L1_PREHEADER:%.*]] 16; CHECK: L.backedge: 17; CHECK-NEXT: br label [[L]] 18; CHECK: L1.preheader: 19; CHECK-NEXT: br label [[L1:%.*]] 20; CHECK: L1: 21; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ 0, [[L1_PREHEADER]] ], [ [[LSR_IV_NEXT:%.*]], [[L2:%.*]] ] 22; CHECK-NEXT: br label [[IDXEND_8:%.*]] 23; CHECK: L2: 24; CHECK-NEXT: [[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 1 25; CHECK-NEXT: br i1 [[C2]], label [[L_LOOPEXIT:%.*]], label [[L1]] 26; CHECK: if6: 27; CHECK-NEXT: [[R2:%.*]] = add i64 [[TMP0]], -1 28; CHECK-NEXT: [[R3:%.*]] = load i64, ptr [[TMP1]], align 8 29; CHECK-NEXT: br label [[IB:%.*]] 30; CHECK: idxend.8: 31; CHECK-NEXT: br i1 [[C3]], label [[IF6:%.*]], label [[L2]] 32; CHECK: ib: 33; CHECK-NEXT: [[R4:%.*]] = mul i64 [[R3]], [[LSR_IV]] 34; CHECK-NEXT: [[R5:%.*]] = add i64 [[R2]], [[R4]] 35; CHECK-NEXT: [[R6:%.*]] = icmp ult i64 [[R5]], undef 36; CHECK-NEXT: [[R7:%.*]] = getelementptr i64, ptr [[P]], i64 [[R5]] 37; CHECK-NEXT: store i64 1, ptr [[R7]], align 8 38; CHECK-NEXT: br label [[L_BACKEDGE]] 39; 40top: 41 br label %L 42 43L: ; preds = %idxend.10, %idxend, %L2, %top 44 br i1 %c, label %L, label %L1 45 46L1: ; preds = %L1.preheader, %L2 47 %r13 = phi i64 [ %r1, %L2 ], [ 1, %L ] 48 %r0 = add i64 %r13, -1 49 br label %idxend.8 50 51L2: ; preds = %idxend.8 52 %r1 = add i64 %r13, 1 53 br i1 %c2, label %L, label %L1 54 55if6: ; preds = %idxend.8 56 %r2 = add i64 %0, -1 57 %r3 = load i64, ptr %1, align 8 58 br label %ib 59 60idxend.8: ; preds = %L1 61 br i1 %c3, label %if6, label %L2 62 63ib: ; preds = %if6 64 %r4 = mul i64 %r3, %r0 65 %r5 = add i64 %r2, %r4 66 %r6 = icmp ult i64 %r5, undef 67 %r7 = getelementptr i64, ptr %p, i64 %r5 68 store i64 1, ptr %r7, align 8 69 br label %L 70} 71