1; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=GCN %s 2 3@array = external addrspace(4) constant [32 x [800 x i32]], align 4 4 5; GCN-LABEL: {{^}}test_lsr_voidty: 6define amdgpu_kernel void @test_lsr_voidty(i1 %arg) { 7entry: 8 br label %for.body 9 10for.body: ; preds = %for.body.i, %entry 11 br label %for.body.i 12 13for.body.i: ; preds = %for.body.i, %for.body 14 %ij = phi i32 [ 0, %for.body ], [ %inc14, %for.body.i ] 15 %tmp = load i32, ptr addrspace(5) undef, align 4 16 %inc13 = or i32 %ij, 2 17 %shl = shl i32 1, 0 18 %and = and i32 %shl, %tmp 19 %tobool = icmp eq i32 %and, 0 20 %add = mul nuw nsw i32 %inc13, 5 21 %tmp1 = zext i32 %add to i64 22 %arrayidx8 = getelementptr inbounds [32 x [800 x i32]], ptr addrspace(4) @array, i64 0, i64 undef, i64 %tmp1 23 %tmp2 = load i32, ptr addrspace(4) %arrayidx8, align 4 24 %and9 = select i1 %tobool, i32 0, i32 %tmp2 25 %xor = xor i32 undef, %and9 26 %inc1 = or i32 %ij, 3 27 %add2 = mul nuw nsw i32 %inc1, 5 28 %add6 = add nuw nsw i32 %add2, 1 29 %tmp3 = zext i32 %add6 to i64 30 %arrayidx9 = getelementptr inbounds [32 x [800 x i32]], ptr addrspace(4) @array, i64 0, i64 undef, i64 %tmp3 31 %tmp5 = load <4 x i32>, ptr addrspace(4) %arrayidx9, align 4 32 %reorder_shuffle2 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 33 %tmp6 = select <4 x i1> undef, <4 x i32> zeroinitializer, <4 x i32> %reorder_shuffle2 34 %inc14 = add nuw nsw i32 %ij, 4 35 br i1 %arg, label %for.body, label %for.body.i 36} 37