xref: /llvm-project/llvm/test/Transforms/LoopSimplify/merge-exits.ll (revision 5d7f84ee17f3f601c49f6124a3a51e557de3ab53)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=loop-simplify,loop-rotate,instcombine,indvars -S -verify-loop-info -verify-dom-info | FileCheck %s
3
4; Loopsimplify should be able to merge the two loop exits
5; into one, so that loop rotate can rotate the loop, so
6; that indvars can promote the induction variable to i64
7; without needing casts.
8
9target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n32:64"
10
11define float @test1(ptr %pTmp1, ptr %peakWeight, i32 %bandEdgeIndex) nounwind {
12; CHECK-LABEL: @test1(
13; CHECK-NEXT:  entry:
14; CHECK-NEXT:    [[T0:%.*]] = load float, ptr [[PEAKWEIGHT:%.*]], align 4
15; CHECK-NEXT:    [[T11:%.*]] = add i32 [[BANDEDGEINDEX:%.*]], -1
16; CHECK-NEXT:    [[T121:%.*]] = icmp sgt i32 [[T11]], 0
17; CHECK-NEXT:    br i1 [[T121]], label [[BB_LR_PH:%.*]], label [[BB3:%.*]]
18; CHECK:       bb.lr.ph:
19; CHECK-NEXT:    [[TMP0:%.*]] = sext i32 [[T11]] to i64
20; CHECK-NEXT:    br label [[BB:%.*]]
21; CHECK:       bb:
22; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ 0, [[BB_LR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[BB]] ]
23; CHECK-NEXT:    [[DISTERBHI_04:%.*]] = phi float [ 0.000000e+00, [[BB_LR_PH]] ], [ [[T4:%.*]], [[BB]] ]
24; CHECK-NEXT:    [[PEAKCOUNT_02:%.*]] = phi float [ [[T0]], [[BB_LR_PH]] ], [ [[T9:%.*]], [[BB]] ]
25; CHECK-NEXT:    [[T2:%.*]] = getelementptr float, ptr [[PTMP1:%.*]], i64 [[INDVARS_IV]]
26; CHECK-NEXT:    [[T3:%.*]] = load float, ptr [[T2]], align 4
27; CHECK-NEXT:    [[T4]] = fadd float [[T3]], [[DISTERBHI_04]]
28; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
29; CHECK-NEXT:    [[T7:%.*]] = getelementptr float, ptr [[PEAKWEIGHT]], i64 [[INDVARS_IV_NEXT]]
30; CHECK-NEXT:    [[T8:%.*]] = load float, ptr [[T7]], align 4
31; CHECK-NEXT:    [[T9]] = fadd float [[T8]], [[PEAKCOUNT_02]]
32; CHECK-NEXT:    [[T10:%.*]] = fcmp olt float [[T4]], 2.500000e+00
33; CHECK-NEXT:    [[T12:%.*]] = icmp sgt i64 [[TMP0]], [[INDVARS_IV_NEXT]]
34; CHECK-NEXT:    [[OR_COND:%.*]] = and i1 [[T10]], [[T12]]
35; CHECK-NEXT:    br i1 [[OR_COND]], label [[BB]], label [[BB1_BB3_CRIT_EDGE:%.*]]
36; CHECK:       bb1.bb3_crit_edge:
37; CHECK-NEXT:    [[T4_LCSSA:%.*]] = phi float [ [[T4]], [[BB]] ]
38; CHECK-NEXT:    [[T9_LCSSA:%.*]] = phi float [ [[T9]], [[BB]] ]
39; CHECK-NEXT:    br label [[BB3]]
40; CHECK:       bb3:
41; CHECK-NEXT:    [[PEAKCOUNT_0_LCSSA:%.*]] = phi float [ [[T9_LCSSA]], [[BB1_BB3_CRIT_EDGE]] ], [ [[T0]], [[ENTRY:%.*]] ]
42; CHECK-NEXT:    [[DISTERBHI_0_LCSSA:%.*]] = phi float [ [[T4_LCSSA]], [[BB1_BB3_CRIT_EDGE]] ], [ 0.000000e+00, [[ENTRY]] ]
43; CHECK-NEXT:    [[T13:%.*]] = fdiv float [[PEAKCOUNT_0_LCSSA]], [[DISTERBHI_0_LCSSA]]
44; CHECK-NEXT:    ret float [[T13]]
45;
46entry:
47  %t0 = load float, ptr %peakWeight, align 4
48  br label %bb1
49
50bb:		; preds = %bb2
51  %t1 = sext i32 %hiPart.0 to i64
52  %t2 = getelementptr float, ptr %pTmp1, i64 %t1
53  %t3 = load float, ptr %t2, align 4
54  %t4 = fadd float %t3, %distERBhi.0
55  %t5 = add i32 %hiPart.0, 1
56  %t6 = sext i32 %t5 to i64
57  %t7 = getelementptr float, ptr %peakWeight, i64 %t6
58  %t8 = load float, ptr %t7, align 4
59  %t9 = fadd float %t8, %peakCount.0
60  br label %bb1
61
62bb1:		; preds = %bb, %entry
63  %peakCount.0 = phi float [ %t0, %entry ], [ %t9, %bb ]
64  %hiPart.0 = phi i32 [ 0, %entry ], [ %t5, %bb ]
65  %distERBhi.0 = phi float [ 0.000000e+00, %entry ], [ %t4, %bb ]
66  %t10 = fcmp uge float %distERBhi.0, 2.500000e+00
67  br i1 %t10, label %bb3, label %bb2
68
69bb2:		; preds = %bb1
70  %t11 = add i32 %bandEdgeIndex, -1
71  %t12 = icmp sgt i32 %t11, %hiPart.0
72  br i1 %t12, label %bb, label %bb3
73
74bb3:		; preds = %bb2, %bb1
75  %t13 = fdiv float %peakCount.0, %distERBhi.0
76  ret float %t13
77}
78
79; Same test as above.
80; This would crash because we assumed TTI was available to process the metadata.
81
82define float @merge_branches_profile_metadata(ptr %pTmp1, ptr %peakWeight, i32 %bandEdgeIndex) nounwind {
83; CHECK-LABEL: @merge_branches_profile_metadata(
84; CHECK-NEXT:  entry:
85; CHECK-NEXT:    [[T0:%.*]] = load float, ptr [[PEAKWEIGHT:%.*]], align 4
86; CHECK-NEXT:    [[T11:%.*]] = add i32 [[BANDEDGEINDEX:%.*]], -1
87; CHECK-NEXT:    [[T121:%.*]] = icmp sgt i32 [[T11]], 0
88; CHECK-NEXT:    br i1 [[T121]], label [[BB_LR_PH:%.*]], label [[BB3:%.*]], !prof [[PROF0:![0-9]+]]
89; CHECK:       bb.lr.ph:
90; CHECK-NEXT:    [[TMP0:%.*]] = sext i32 [[T11]] to i64
91; CHECK-NEXT:    br label [[BB:%.*]]
92; CHECK:       bb:
93; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ 0, [[BB_LR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[BB]] ]
94; CHECK-NEXT:    [[DISTERBHI_04:%.*]] = phi float [ 0.000000e+00, [[BB_LR_PH]] ], [ [[T4:%.*]], [[BB]] ]
95; CHECK-NEXT:    [[PEAKCOUNT_02:%.*]] = phi float [ [[T0]], [[BB_LR_PH]] ], [ [[T9:%.*]], [[BB]] ]
96; CHECK-NEXT:    [[T2:%.*]] = getelementptr float, ptr [[PTMP1:%.*]], i64 [[INDVARS_IV]]
97; CHECK-NEXT:    [[T3:%.*]] = load float, ptr [[T2]], align 4
98; CHECK-NEXT:    [[T4]] = fadd float [[T3]], [[DISTERBHI_04]]
99; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
100; CHECK-NEXT:    [[T7:%.*]] = getelementptr float, ptr [[PEAKWEIGHT]], i64 [[INDVARS_IV_NEXT]]
101; CHECK-NEXT:    [[T8:%.*]] = load float, ptr [[T7]], align 4
102; CHECK-NEXT:    [[T9]] = fadd float [[T8]], [[PEAKCOUNT_02]]
103; CHECK-NEXT:    [[T10:%.*]] = fcmp olt float [[T4]], 2.500000e+00
104; CHECK-NEXT:    [[T12:%.*]] = icmp sgt i64 [[TMP0]], [[INDVARS_IV_NEXT]]
105; CHECK-NEXT:    [[OR_COND:%.*]] = and i1 [[T10]], [[T12]]
106; CHECK-NEXT:    br i1 [[OR_COND]], label [[BB]], label [[BB1_BB3_CRIT_EDGE:%.*]], !prof [[PROF1:![0-9]+]]
107; CHECK:       bb1.bb3_crit_edge:
108; CHECK-NEXT:    [[T4_LCSSA:%.*]] = phi float [ [[T4]], [[BB]] ]
109; CHECK-NEXT:    [[T9_LCSSA:%.*]] = phi float [ [[T9]], [[BB]] ]
110; CHECK-NEXT:    br label [[BB3]]
111; CHECK:       bb3:
112; CHECK-NEXT:    [[PEAKCOUNT_0_LCSSA:%.*]] = phi float [ [[T9_LCSSA]], [[BB1_BB3_CRIT_EDGE]] ], [ [[T0]], [[ENTRY:%.*]] ]
113; CHECK-NEXT:    [[DISTERBHI_0_LCSSA:%.*]] = phi float [ [[T4_LCSSA]], [[BB1_BB3_CRIT_EDGE]] ], [ 0.000000e+00, [[ENTRY]] ]
114; CHECK-NEXT:    [[T13:%.*]] = fdiv float [[PEAKCOUNT_0_LCSSA]], [[DISTERBHI_0_LCSSA]]
115; CHECK-NEXT:    ret float [[T13]]
116;
117entry:
118  %t0 = load float, ptr %peakWeight, align 4
119  br label %bb1
120
121bb:		; preds = %bb2
122  %t1 = sext i32 %hiPart.0 to i64
123  %t2 = getelementptr float, ptr %pTmp1, i64 %t1
124  %t3 = load float, ptr %t2, align 4
125  %t4 = fadd float %t3, %distERBhi.0
126  %t5 = add i32 %hiPart.0, 1
127  %t6 = sext i32 %t5 to i64
128  %t7 = getelementptr float, ptr %peakWeight, i64 %t6
129  %t8 = load float, ptr %t7, align 4
130  %t9 = fadd float %t8, %peakCount.0
131  br label %bb1
132
133bb1:		; preds = %bb, %entry
134  %peakCount.0 = phi float [ %t0, %entry ], [ %t9, %bb ]
135  %hiPart.0 = phi i32 [ 0, %entry ], [ %t5, %bb ]
136  %distERBhi.0 = phi float [ 0.000000e+00, %entry ], [ %t4, %bb ]
137  %t10 = fcmp uge float %distERBhi.0, 2.500000e+00
138  br i1 %t10, label %bb3, label %bb2, !prof !0
139
140bb2:		; preds = %bb1
141  %t11 = add i32 %bandEdgeIndex, -1
142  %t12 = icmp sgt i32 %t11, %hiPart.0
143  br i1 %t12, label %bb, label %bb3
144
145bb3:		; preds = %bb2, %bb1
146  %t13 = fdiv float %peakCount.0, %distERBhi.0
147  ret float %t13
148}
149
150!0 = !{!"branch_weights", i32 2000, i32 1}
151